Hello, We are working on a custom carrier board and I wanted to validate some of the assumptions I made regarding the power down structure of the module. Based off of the design guide: For power up, all carrier board power is enabled AFTER the SYS_RESET* signal is de-asserted. During a controlle…

hello csileo, you may also access Jetson Xavier NX Product Design Guide , please read chapter-5.1, [Power Supply and Sequencing] for details. thanks