Xavier NX SOC_GPIO10 configuration


We are using a custom carrier board with the Xavier NX SOM. We generated custom pinmux files using the Jetson Xavier NX Pinmux Table. .dtsi files were generated and included in our .dts, and we also have included the pinmux.cfg.

We have noticed that the configuration of SOC_GPIO10 is inconsistent between the files generated with the pinmux table and the original tegra194-mb1-bct-pmic-p3668-0001-a00.cfg from Jetpack v32.7.2. :

  • in our generated files, SOC_GPIO10 has tristate enabled
  • in the original pmic.cfg from Jetpack, it has tristate disabled
    By revealing the hidden lines in the Pinmux Spreadhseet, SOC_GPIO10 is indeed set with tristate.

However, we measured that disabling this tristate value (by manually editing the .dtsi) would divide our board’s consumption by 3. We would like to have your input on what does this pin exactly do, and which value should be used. The Xavier Series SoC Technical Reference Manual indicates that this pin corresponds to PWM7 for SOC OVR but it is not yet clear to us what it’s effects are.

Thank you for your support,
Enguerrand de Ribaucourt

hello enguerrand.de-ribaucourt,

this initial state (tri-state) should be only available if the pin selected as GPIO. however, this pin is by default as GP_PWM7.
since this is the customize board, you may also change the pinmux configuration applied by the software.
please see-also developer guide, Pinmux Changes.

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