We use the xavier designed a board.
About the UPHY configure, the xavier kit board configure as follows:
C0 --- lane2 lane3 lane4 lane5 C1 --- lane0 C2 --- not use C3 --- lane7 C4 --- lane8 lan9 USB3-2 --- lane1 USB3-0 --- lane6 USB3-3 --- lane11 UFS --- lane10
But, The hardware we designed is different from xavier kit board. our board configure as follows:
C0 --- lane2 lane3 C1 --- lane6 C2 --- lane5 C3 --- lane7 C4 --- lane0 USB3-2 --- lane1 USB3-1 --- lane4 USB3-3 --- lane11 SATA --- lane10
we edit the file “Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xslm” about the UPHY, and gengrate the dt file, but in the dt file, we could not find the content about the UPHY. so, we could not edit the UPHY default configure.
According to the description of the document “Tegra_Linux_Driver_Package_AGX_Xavier_Adaptation_Guide.pdf”, The UPHY can be configured through file BPMP.dts. But, In the source code, we can’t find this file.
Can you tell me how to modify the UPHY default configure for our board?