Xavier PCIE Link Training problem

I connect one xilinx board to xavier by pcie 2.0 x4. But xavier can not recognize the xilinx endpoint. I use protocol analyzer and the ltssm is shown as attachment file 《pcie_gen2_ltssm.jpeg》. Both rc and ep can enter L0, but the rc will stuck in recovery state. I force pcie protocol to pcie gen1 and the rc recovery ep repeatedly, which is shown as attachment file 《pcie_gen1_ltssm.jpeg》.How can I fix it? thanks

This is probably because the PCIe link electricals are not good. Do you observe any AER errors (check in dmesg) in the log? How lengthy are cables being used here?