Xavier pinmux I2C and GPIO setting for SPE

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

I successfull run SPE demo on Xavier. I want to using i2c-gp2-clk as a gpio on Xavier R5. How I can modify the pinmux?

2

Hello, purehearted:
You can follow the example in doc/gpio.md
the pin you mentioned is i2c-gp2-clk, and you can search the register in TRM: PADCTL_AO_GEN2_I2C_SCL, and change the setting value as desired.
As a GPIO, bit 10 (GPIO_SF_SEL) should be set as GPIO (0). Other bits should also be set according to your configuration.

br
ChenJian

3

Hi, jechen

I have download TRM, but I can’t find the register PADCTL_AO_GEN2_I2C_SCL. The Document is Xavier_TRM_DP09253002. It’s right?

4

hello, purehearted:
yes. please search in the doc.

br
Chenjian

5

Hi jachen,

I’m trying to get the demo GPIO app code working on my Xavier and I’m having trouble to get the pulse out from the OUT pin (16), meaning that I can’t observe pulses from an oscilloscope. However, I can observe the debug print info when I apply voltage change to the IN pin (32).

I followed the steps in the instruction to set the pinmux, src, and gpio-intmap, and then flash the entire Xavier with the flashing script. However, I did not change any device tree files since I’m assuming the kernel isn’t accessing these two pins. Could you give me some insights on how to check this? Which device tree file should I look at? How do I find which device tree file to check?

If the device tree does not need to be changed, then what could potentially be the problem? Thanks!

6

Hello, hengruiz:
You mean you can see ‘GPIO input irq triggered’ when you apply voltage change in pin(32)? If then, that means GPIO IN configures correctly and works well.
I don’t know why GPIO OUT pin does not work. Generally, IN and OUT pin settings should be similar, except the direction.
Some tips:

  1. After a successful flash, there will be copy files for those SCR/PINMUX/INT-MAPPING, please update the original files @bootloader/t186ref/BCT/
  2. for PINMUX, some configurations have 2 entries, like:
    pinmux.0x0c303048 = 0x00000000; # GPIO can1_en_pbb1
    …
    pinmux.0x0c303048 = 0x0000c054; # can1_en_pbb1: rsvd0, pull-down, tristate-enable, input-enable

It’s better to update both.

br
ChenJian

7

Hi jachen,
For the GPIO demo code with a default jetpack installation: Are the instructions in the SPE developer guide sufficient or does the device tree need to be modified as well to make the demo work?
Thanks!

8

Hello, bastibr8yu:
Yes, I believe so. Refer to rt-aux-cpu-demo/doc/gpio.md for details.

br
Chenjian

9

Hi all,

I also want to figure out “Are the instructions in the SPE developer guide sufficient or does the device tree need to be modified as well to make the demo work?” (l4t version 32.2.1)