Xavier Power Logic between DC Jack and VCC_SRC_FET


I am now analyzing the schematic of the Xavier, and I do not understand the Power Logic between DC Jack and VCC_SRC_FET.
And can somebody help me to analyze the Schematic?


Hi, please list your question in detail.


The question is : when plug The DC Jack, and how the VCC_DCIN pass through the FET and get the power of VCC_SRC_FET?
I don’t understand that logic.

and where is VCC_RTC and how to wire a cell to it?

When plug in, Q6 will be turned on and so the dual-MOSFET is turned on.

VCC_RTC (L53) is routed to C512.


In the page Of Xavier schematic 5, you can find the VCC_RTC which use a super Cap

Thank you for pointing out!

may be you know as well how to connect gps to xavier for time synchronization [ PPS ] ?
It seems that some pins should be determined and some software support added.

When Q6 turns on, the voltage of VCC_DCIN_EN and VCC_DCIN_Q is equal, and these two valtage is 0 V, and the MOSFET require VGS(th) AS FOLLEW, and how can MOS turn on?

They are not equal when Q6 ON, there is body diode in MOSFET, so there will be current goes through res from S to G.

You mean that use the current pass through the body diode in MOSFET, is it right?
And how much is current passing through the body diode in MOSFET?

It seems that the current passes through the body diode and reduces after it to a certain extent because of the resistance of the latter.

I am a hareware engineer, and in my opinion you can do as follew, I hope this can help.
You can use the document the can be download from http://developer.nvidia.com/embedded/dlc/jetson-xavier-pinmux to help you to select a appropriate pin that can be suitable for the electrical level of PPS.
Then modify the devicetree

Thank you for pointing out!
It seems that 2 pins should be picked from the set below:
Specifically J58, and H58, but how to visually find them at the surface of the devkit?

You may look the connectors in the Schematic, J30 for example, and you can find the signal in J30 that may be suitable for PPS
Because you use the Xavier Kit developed by NVIDIA, so you must find the useable pin that NVIDIA provide in the Kit.

I started a separate thread for my issue. Thanks for helping!

Please refer to the datasheet of MOSFET and circuit design of this part to calculate.

@suiyufeng726 Yes, thank you!
and I am trying to get through the bunch of files at http://developer.nvidia.com/embedded/dlc/jetson-xavier-developer-kit-carrier-board-design-files-b03 to correlate actual physical pins with the specification files somehow

OK, i got it, thanks

@suiyufeng726, Thanks.
It seems that the task narrowed down to the issue of mapping of UART5tx and UART5rx to J30 pins that not only need to be determined, but also that will require some device tree modification for the maping to happen.

Is that what you meant?
Or your idea is that the mapping is not required as long as the signal characteristics will be the same and as long as the device tree can be modified?