Hello,
I see a discrepancy between the SOM’s datasheet and the carrier board schematics.
The files:
Jetson-AGX-Xavier-Series-Datasheet.pdf (see figure 1)
P2822_B03_OrCAD_schematics.pdf (see “1V8 & 3V3” on page# 30)
According to the datasheet, the “carrier_pwr_on” signals goes high after the “module power” (i.e.1V8 rail and others enabled at power on), while according to the schematics on page# 30 it looks like the “carrier_pwr_on” enables the 1V8 rail, therefore goes high before the 1V8 rail.
Thanks, I know that, and also the 3V3.
Does this mean that the carrier board power (DC/DC, LDOs, etc.) for peripheral components does not care at what time it is powered up related to the SOM’s power up?