Xilinx FPGA MIPI Orin Nano

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
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1

Hello, I am using Xilinx FPGA to simulate the IMX219 MIPI connection to Orin Nano. I am using V4L2 to capture images. If the embedded_stetata-high field in the tegra234-camera-rbpcv2-imx219.dtsi file is set to 0 or logged out, an error will be reported：

v4l2-ctl --device /dev/video0 --set-fmt-video=width=3280,height=2464,pixelformat=RG10 --stream-mmap --stream-to=./output_3280x2464_RG10_001.raw --stream-count=1

[ 487.663115] bwmgr API not supported
[ 490.413684] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 490.426434] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 490.436019] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 490.443747] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=1, csi_port=1
[ 490.454428] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 490.462148] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_open: VI channel not found for stream- 1 vc- 0
[ 490.472971] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 493.229821] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 493.238961] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 493.248551] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 493.256276] t194-nvcsi 13e40000.host1x:nvcsi@15a00000: csi5_stream_close: Error in closing stream_id=1, csi_port=1
[ 493.266943] (NULL device *): vi_capture_control_message: NULL VI channel received
[ 494.285587] tegra194-vi5 13e40000.host1x:vi0@15c00000: capture control message timed out
[ 494.293921] tegra194-vi5 13e40000.host1x:vi0@15c00000: vi_capture_control_send_message: failed to send IVC control message
[ 495.309575] tegra194-vi5 13e40000.host1x:vi0@15c00000: capture control message timed out
[ 495.317963] tegra-camrtc-capture-vi tegra-capture-vi: vi capture setup failed
[ 495.325321] tegra-camrtc-capture-vi tegra-capture-vi: fatal: error recovery failed

2

Moved to Jetson Orin Nano - NVIDIA Developer Forums for support

4

What’s your problem want to fixed? What do you mean “logged out”

5

Remove the meaning of this configuration item

6

I am currently using FPGA simulated imx219 to send data. I want to remove the two rows of enhanced row configuration data and directly use FPGA to send data. How do I configure it

7

Suppose you need to check the FPGA spec or consult with vendor.

Thanks

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