Hello, I am trying to compile the vectorAdd sample application on the Jetson Xavier using the nvcc compiler version 11.4. I am adding the -Xptxas -dlcm and -dscm=cg however viewing the ptx code, the ld and st is not changing to .ld.cg and st.cg. Do you have any idea why? I tried to use also the flc…

The -Xptxas switch doesn’t affect the generation of PTX. It affects the conversion of PTX to SASS. So it is expected that -Xptxas will have no impact on the generated PTX. Refer to the nvcc manual for further description of the compilation flow.

Ah ok my problem is elsewhere then, since the Xptxas is not preventing of accessing the L1 cache. When I am using nsight compute, I am always obtaining % of cache hit. So the SM is always accessing the L1 cache

dlcm affects global loads. The L1 can also hit on local activity.

Hello again, Well I tried again, and here are the results: First here is the command line of building the executable code (I used the makefile of NVIDIA and I just added the flcm and fscm flags in it) [image] Then, I did the profiling using ncu, I obtained: [image] It seems it is still acces…

I think it is 72 you are right. I tested again with 72 and I obtained the same results. I paid attention to something that the global load has 0% cache hit but the store has 50%. That’s why I obtained 16%. [image] I retried again without the dlcm and dscm flags, and the cache hit on the global lo…

Hello again, As I was checking the nsight compute release notes, I believe maybe the ncu version on the Jetson 2022.2.1.0 may have a bug. If I understood correctly, the 2023 version of nsight compute is not available for the Jetson right? Thanks again for your support.

When I compile the vector add sample code with your -Xptxas -dlcm=cg -Xptxas -dscm=cg switches for cc 5.2 on godbolt , and look at the SASS output: _Z9vectorAddPKfS0_Pfi: MOV R1, c[0x0][0x20] S2R R0, SR_CTAID.X S2R R2, SR_TID.X XMAD.MRG R3, R0.reuse, c[0x0] [0x8].H1, RZ XMAD R2, R0.reuse, …

Hi, I’m having the same issue but on an RTX 3060 Ti. Using flcm/fscm doesn’t change the loads/stores either. Compiling for CC 5.2, 6.1, 7.0, 7.5, 8.6 does not add .CG for me. Compiling for 7.0 and 7.5 adds a .SYS decorator to the LDG and STG but not .CG. Driver version: 555.42.02 CUDA version: 12…

According to my testing on godbolt there was a change in compiler behavior sometime between CUDA 12.3.1 and CUDA 12.4.1. If this is of concern to you, you may wish to file a bug

Xptxas default cache modifier on global/generic load and store not working

Accelerated Computing CUDA CUDA NVCC Compiler

Robert_Crovella June 15, 2023, 7:34am 6

Is Jetson Xavier a sm_70 device? Why are you compiling for compute_70, sm_70 ?

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Xptxas default cache modifier on global/generic load and store not working

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