enable prepare protect duty clock count count count rate req_rate accuracy phase cycle --------------------------------------------------------------------------------------------- sor_linka_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s8_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s8_pad_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s7_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s8_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s7_pad_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s7_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] emchub 0 0 0 467000390 467000390 0 0 50000 *[ default_freq 0] mchub 0 0 0 233500195 233500195 0 0 50000 *[ default_freq 0] mgbe3_eee_pcs 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] mgbe2_eee_pcs 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] mgbe1_eee_pcs 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] mgbe0_eee_pcs 1 1 0 102000000 102000000 0 0 50000 *[ default_freq 0] mgbe3_rx_pcs_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe3_rx_pcs 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe3_rx_pcs_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe2_rx_pcs_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe2_rx_pcs 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe2_rx_pcs_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe1_rx_pcs_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe1_rx_pcs 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe1_rx_pcs_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe0_rx_pcs_input 2 2 0 156250000 156250000 0 0 50000 *[ default_freq 0] mgbe0_rx_pcs 2 2 0 156250000 0 0 0 50000 *[ default_freq 0] mgbe0_rx_pcs_m 1 1 0 156250000 0 0 0 50000 *[ default_freq 0] gpusysclk 1 1 0 306000000 306000000 0 0 50000 *[ default_freq 0] mgbe3_rx_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe3_rx_input_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe2_rx_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe2_rx_input_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe1_rx_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe1_rx_input_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] mgbe0_rx_input 2 2 0 644531250 644531250 0 0 50000 *[ default_freq 0] mgbe0_rx_input_m 1 1 0 644531250 0 0 0 50000 *[ default_freq 0] gpc1clk 0 0 0 1300500000 1300500000 0 0 50000 *[ default_freq 0] pex1_c5_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex1_c5_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c4_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c4_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c3_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c3_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c2_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c2_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c1_core 1 1 0 62500000 62500000 0 0 50000 *[ default_freq 0] pex0_c1_core_m 0 0 0 62500000 500000000 0 0 50000 *[ default_freq 0] pex0_c0_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex0_c0_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pllp_out_jtag 0 0 0 51000000 51000000 0 0 50000 *[ default_freq 0] pex2_c10_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c10_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] dsi_pad_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] sor_pad_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] pre_sf0 0 0 0 0 0 0 0 50000 *[ default_freq 0] pre_sor1 0 0 0 0 0 0 0 50000 *[ default_freq 0] pre_sor0 0 0 0 0 0 0 0 50000 *[ default_freq 0] pex2_c9_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c9_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c8_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c8_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c7_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex2_c7_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex1_c6_core 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pex1_c6_core_m 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] pll_p 0 0 0 816000000 816000000 0 0 50000 *[ default_freq 0] mphy_l1_rx_ana 0 0 0 583680000 583680000 0 0 50000 *[ default_freq 0] mphy_l1_rx_ana_m 0 0 0 583680000 583680000 0 0 50000 *[ default_freq 0] mphy_l0_rx_ana 0 0 0 583680000 583680000 0 0 50000 *[ default_freq 0] mphy_l0_rx_ana_m 0 0 0 583680000 583680000 0 0 50000 *[ default_freq 0] gpu_pwr 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] nafll_gpusys 0 0 0 1300500000 1300500000 0 0 50000 *[ default_freq 0] nafll_gpc1 0 0 0 1300500000 1300500000 0 0 50000 *[ default_freq 0] nafll_gpc0 0 0 0 1300500000 1300500000 0 0 50000 *[ default_freq 0] gpc0clk 1 1 0 306000000 306000000 0 0 50000 *[ default_freq 0] fuse 1 1 0 38400000 38400000 0 0 50000 *[ default_freq 0] fuse_burn 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] pllrefe_vcoout 1 1 0 625000000 625000000 0 0 50000 *[ default_freq 0] mgbe3_ptp_ref 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe2_ptp_ref 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe1_ptp_ref 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe0_ptp_ref 1 1 0 312500000 312500000 0 0 50000 *[ default_freq 0] pllrefe_vcoout_gated 0 0 0 625000000 625000000 0 0 50000 *[ default_freq 0] csite 0 0 0 625000000 625000000 0 0 50000 *[ default_freq 0] mphy_l0_tx_ls_3xbit_div 0 0 0 26041666 26041666 0 0 50000 *[ default_freq 0] mphy_l0_tx_ls_symb_div 0 0 0 434027 434027 0 0 50000 *[ default_freq 0] mphy_l0_tx_mux_symb_div 0 0 0 434027 434027 0 0 50000 *[ default_freq 0] mphy_l0_tx_2x_symb 0 0 0 434027 434027 0 0 50000 *[ default_freq 0] mphy_l0_tx_pre_symb 0 0 0 217013 217013 0 0 50000 *[ default_freq 0] mphy_l0_tx_symb 0 0 0 217013 217013 0 0 50000 *[ default_freq 0] mphy_l0_tx_symb_m 0 0 0 217013 217013 0 0 50000 *[ default_freq 0] mphy_l0_tx_ls_3xbit 0 0 0 26041666 26041666 0 0 50000 *[ default_freq 0] mphy_l0_rx_hs_symb_div 0 0 0 625000000 625000000 0 0 50000 *[ default_freq 0] mphy_l0_rx_ls_bit_div 0 0 0 12019230 12019230 0 0 50000 *[ default_freq 0] mphy_l0_rx_ls_symb_div 0 0 0 600961 600961 0 0 50000 *[ default_freq 0] mphy_l0_rx_mux_symb_div 0 0 0 600961 600961 0 0 50000 *[ default_freq 0] mphy_l0_rx_symb 0 0 0 600961 600961 0 0 50000 *[ default_freq 0] mphy_l0_rx_symb_m 0 0 0 600961 600961 0 0 50000 *[ default_freq 0] mphy_l0_rx_ls_bit 0 0 0 12019230 12019230 0 0 50000 *[ default_freq 0] mphy_core_pll_fixed 0 0 0 208333333 208333333 0 0 50000 *[ default_freq 0] eqos_tx_divider 0 0 0 125000000 125000000 0 0 50000 *[ default_freq 0] eqos_macsec_tx 0 0 0 125000000 125000000 0 0 50000 *[ default_freq 0] eqos_tx 0 0 0 125000000 125000000 0 0 50000 *[ default_freq 0] eqos_ptp_ref 0 0 0 208333334 208333334 0 0 50000 *[ default_freq 0] eqos_axi 0 0 0 125000000 125000000 0 0 50000 *[ default_freq 0] emc 1 1 0 665600000 665000000 0 0 50000 *[ default_freq 0] eqos_rx_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] eqos_macsec_rx 0 0 0 0 0 0 0 50000 *[ default_freq 0] eqos_rx 0 0 0 0 0 0 0 50000 *[ default_freq 0] eqos_rx_m 0 0 0 0 0 0 0 50000 *[ default_freq 0] pllp_div17 0 0 0 24000000 24000000 0 0 50000 *[ default_freq 0] sor_safe 0 0 0 24000000 24000000 0 0 50000 *[ default_freq 0] dpaux 0 0 0 24000000 24000000 0 0 50000 *[ default_freq 0] i2s6_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s5_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s4_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s3_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s2_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s1_sync_input 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s6_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s5_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s4_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s3_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s2_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] i2s1_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dspk2_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dspk1_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dmic4_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dmic3_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dmic2_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] dmic1_sync_clk 0 0 0 0 0 0 0 50000 *[ default_freq 0] osc 9 9 0 38400000 38400000 0 0 50000 *[ default_freq 0] pll_hub 0 0 0 467000390 467000390 0 0 50000 *[ default_freq 0] sor_linka_afifo 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor_linka_afifo_m 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] dsi_core 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] rg1 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] rg1_m 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sppll1_vco 0 0 0 2700000000 2700000000 0 0 50000 *[ default_freq 0] sppll1_div27pn 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] sppll1_clkoutpn 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] dp_link_ref 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] nafll_cluster2_dsu 0 0 0 115200000 115200000 0 0 50000 *[ default_freq 0] nafll_cluster1_dsu 0 0 0 115200000 115200000 0 0 50000 *[ default_freq 0] nafll_cluster0_dsu 0 0 0 115200000 115200000 0 0 50000 *[ default_freq 0] nafll_dce 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] dce_cpu_nic 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] dce_cpu 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] dce_nic 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] nafll_ofa 0 0 0 780800000 780800000 0 0 50000 *[ default_freq 0] ofa 0 0 0 780800000 780800000 0 0 50000 *[ default_freq 0] nafll_seu1 0 0 0 473600000 473600000 0 0 50000 *[ default_freq 0] fr_seu1 0 0 0 473600000 473600000 0 0 50000 *[ default_freq 0] seu1 0 0 0 473600000 473600000 0 0 50000 *[ default_freq 0] pll_gbe 2 2 0 100000000 100000000 0 0 50000 *[ default_freq 0] uphy_gbe_pll2_tx_ref 1 1 0 644531250 644531250 0 0 50000 *[ default_freq 0] mgbe3_tx 0 0 0 644531250 644531250 0 0 50000 *[ default_freq 0] mgbe2_tx 0 0 0 644531250 644531250 0 0 50000 *[ default_freq 0] mgbe1_tx 0 0 0 644531250 644531250 0 0 50000 *[ default_freq 0] mgbe0_tx 1 1 0 644531250 644531250 0 0 50000 *[ default_freq 0] uphy_gbe_pll2_xdig 2 2 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe3_mac_divider 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe3_macsec 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe3_mac 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe2_mac_divider 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe2_macsec 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe2_mac 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe1_mac_divider 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe1_macsec 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe1_mac 0 0 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe0_mac_divider 3 3 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe0_macsec 1 1 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe0_mac 1 1 0 312500000 312500000 0 0 50000 *[ default_freq 0] mgbe3_tx_pcs 0 0 0 156250000 156250000 0 0 50000 *[ default_freq 0] mgbe2_tx_pcs 0 0 0 156250000 156250000 0 0 50000 *[ default_freq 0] mgbe1_tx_pcs 0 0 0 156250000 156250000 0 0 50000 *[ default_freq 0] mgbe0_tx_pcs 1 1 0 156250000 156250000 0 0 50000 *[ default_freq 0] pllgbe_hps 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] aon_uart_fst_mipi_cal 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] nafll_cluster2_core 0 0 0 2035200000 2035200000 0 0 50000 *[ default_freq 0] nafll_cluster1_core 0 0 0 2035200000 2035200000 0 0 50000 *[ default_freq 0] nafll_cluster0_core 0 0 0 2035200000 2035200000 0 0 50000 *[ default_freq 0] pll_nvhs 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] pllnvhs_hps 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] nafll_pva_vps 0 0 0 1152000000 1152000000 0 0 50000 *[ default_freq 0] pva0_vps 0 0 0 512000000 512000000 0 0 50000 *[ default_freq 0] nafll_pva_core 0 0 0 4294967295 4294967295 0 0 50000 *[ default_freq 0] pva0_cpu_axi 0 0 0 358400000 358400000 0 0 50000 *[ default_freq 0] nafll_bpmp 0 0 0 204800000 204800000 0 0 50000 *[ default_freq 0] sf1 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sf0 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] dsi_pixel 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor1 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor1_m 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor0 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor0_m 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] nafll_dla1_core 0 0 0 4294967295 4294967295 0 0 50000 *[ default_freq 0] dla1_core 0 0 0 1369600000 1369600000 0 0 50000 *[ default_freq 0] nafll_dla1_falcon 0 0 0 4294967295 4294967295 0 0 50000 *[ default_freq 0] dla1_falcon 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] nafll_dla0_core 0 0 0 4294967295 4294967295 0 0 50000 *[ default_freq 0] dla0_core 0 0 0 1369600000 1369600000 0 0 50000 *[ default_freq 0] nafll_dla0_falcon 0 0 0 4294967295 4294967295 0 0 50000 *[ default_freq 0] dla0_falcon 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] nafll_vic 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] vic 0 0 0 115200000 115200000 0 0 50000 *[ default_freq 0] nafll_vi 0 0 0 832000000 832000000 0 0 50000 *[ default_freq 0] vi 0 0 0 832000000 832000000 0 0 50000 *[ default_freq 0] usb2_trk 1 1 0 9600000 9600000 0 0 50000 *[ default_freq 0] uartc 0 0 0 1828571 1828571 0 0 50000 *[ default_freq 0] nafll_tsec 0 0 0 960000000 960000000 0 0 50000 *[ default_freq 0] tsec 0 0 0 192000000 192000000 0 0 50000 *[ default_freq 0] mphy_flsm 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] dmic5 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] sor1_ref 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] nafll_se 1 1 0 473600000 473600000 0 0 50000 *[ default_freq 0] fr_se 1 1 0 473600000 473600000 0 0 50000 *[ default_freq 0] se 1 1 0 473600000 473600000 0 0 50000 *[ default_freq 0] pll_c4 0 0 0 781000781 781000781 0 0 50000 *[ default_freq 0] sdmmc4_axicif 0 0 0 195250196 195250196 0 0 50000 *[ default_freq 0] sdmmc4 0 0 0 195250196 200000000 0 0 50000 *[ default_freq 0] pllc4_vco_div2 0 0 0 390500390 390500390 0 0 50000 *[ default_freq 0] pllc4_muxed 0 0 0 390500390 260333593 0 0 50000 *[ default_freq 0] sdmmc1 0 0 0 3050785 400000 0 0 50000 *[ default_freq 0] pllc4_out2 0 0 0 156200156 156200156 0 0 50000 *[ default_freq 0] pllc4_out1 0 0 0 260333593 260333593 0 0 50000 *[ default_freq 0] nafll_sce 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] sce_cpu_nic 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] sce_cpu 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] sce_nic 0 0 0 281600000 281600000 0 0 50000 *[ default_freq 0] nafll_rce 1 1 0 614400000 614400000 0 0 50000 *[ default_freq 0] rce_cpu_nic 3 3 0 115200000 115200000 0 0 50000 *[ default_freq 0] rce_cpu 1 1 0 115200000 614400000 0 0 50000 *[ default_freq 0] rce_nic 1 1 0 115200000 614400000 0 0 50000 *[ default_freq 0] aon_touch 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] nafll_nvjpg 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] nvjpg 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] nafll_nvenc 0 0 0 998400000 998400000 0 0 50000 *[ default_freq 0] nvenc 0 0 0 998400000 998400000 0 0 50000 *[ default_freq 0] vpll1 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] nvdisplay_p1 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] vpll0_ref 0 0 0 38400000 38400000 0 0 50000 *[ default_freq 0] vpll0 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] nvdisplay_p0_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] sor1_pll_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] pre_sor1_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] sor0_pll_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] sor0_div 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] pre_sor0_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] sor0_ref 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] nvdisplay_p0 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] rg0 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] rg0_m 0 0 0 148500000 148500000 0 0 50000 *[ default_freq 0] dsipll_vco 0 0 0 1350000000 1350000000 0 0 50000 *[ default_freq 0] dsipll_clkoutpn 0 0 0 135000000 135000000 0 0 50000 *[ default_freq 0] dsipll_clkouta 0 0 0 337500000 337500000 0 0 50000 *[ default_freq 0] disppll 0 0 0 1191000000 1191000000 0 0 50000 *[ default_freq 0] disp 0 0 0 1191000000 1191000000 0 0 50000 *[ default_freq 0] dsc 0 0 0 397000000 397000000 0 0 50000 *[ default_freq 0] disphubpll 0 0 0 12698437 12698437 0 0 50000 *[ default_freq 0] nafll_nvdec 0 0 0 998400000 998400000 0 0 50000 *[ default_freq 0] nvdec 0 0 0 998400000 998400000 0 0 50000 *[ default_freq 0] pll_nvcsi 0 0 0 1285800000 1285800000 0 0 50000 *[ default_freq 0] nvcsi 0 0 0 428600000 428600000 0 0 50000 *[ default_freq 0] mphy_tx_1mhz_ref 0 0 0 1010526 1010526 0 0 50000 *[ default_freq 0] pll_e 1 1 0 100000000 100000000 0 0 50000 *[ default_freq 0] plle_hps 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] uphy_pll3 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] mphy_l0_tx_hs_symb_div 0 0 0 500000000 500000000 0 0 50000 *[ default_freq 0] sppll0_vco 0 0 0 2700000000 2700000000 0 0 50000 *[ default_freq 0] sppll0_div27pn 0 0 0 100000000 100000000 0 0 50000 *[ default_freq 0] sppll0_div25 0 0 0 108000000 108000000 0 0 50000 *[ default_freq 0] aza_2xbit 0 0 0 108000000 108000000 0 0 50000 *[ default_freq 0] aza_bit 0 0 0 54000000 54000000 0 0 50000 *[ default_freq 0] sppll0_clkoutpn 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] sppll0_clkouta 0 0 0 900000000 900000000 0 0 50000 *[ default_freq 0] sppll0_clkoutb 0 0 0 540000000 540000000 0 0 50000 *[ default_freq 0] hub 0 0 0 540000000 540000000 0 0 50000 *[ default_freq 0] sppll0_div10 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] maud 0 0 0 270000000 270000000 0 0 50000 *[ default_freq 0] nafll_isp 0 0 0 1011200000 1011200000 0 0 50000 *[ default_freq 0] isp 0 0 0 1011200000 1011200000 0 0 50000 *[ default_freq 0] utmip_pll 2 2 0 960000000 960000000 0 0 50000 *[ default_freq 0] utmipll_clkout48 1 1 0 48000000 48000000 0 0 50000 *[ default_freq 0] xusb_fs 1 1 0 48000000 48000000 0 0 50000 *[ default_freq 0] xusb_fs_dev 0 0 0 48000000 48000000 0 0 50000 *[ default_freq 0] xusb_fs_host 0 0 0 48000000 48000000 0 0 50000 *[ default_freq 0] utmipll_clkout480 2 2 0 480000000 480000000 0 0 50000 *[ default_freq 0] mgbes_app 1 1 0 480000000 480000000 0 0 50000 *[ default_freq 0] mgbe3_app 0 0 0 480000000 480000000 0 0 50000 *[ default_freq 0] mgbe2_app 0 0 0 480000000 480000000 0 0 50000 *[ default_freq 0] mgbe1_app 0 0 0 480000000 480000000 0 0 50000 *[ default_freq 0] mgbe0_app 1 1 0 480000000 480000000 0 0 50000 *[ default_freq 0] xusb_ss 1 1 0 120000000 120000000 0 0 50000 *[ default_freq 0] xusb_ss_superspeed 1 1 0 120000000 120000000 0 0 50000 *[ default_freq 0] xusb_ss_dev 0 0 0 120000000 120000000 0 0 50000 *[ default_freq 0] xusb_hs_hsicp 0 0 0 120000000 120000000 0 0 50000 *[ default_freq 0] nafll_nvjpg1 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] nvjpg1 0 0 0 729600000 729600000 0 0 50000 *[ default_freq 0] pll_c 0 0 0 199999804 199999804 0 0 50000 *[ default_freq 0] qspi1_2x_pm 0 0 0 199999804 199999804 0 0 50000 *[ default_freq 0] qspi1_pm 0 0 0 199999804 199999804 0 0 50000 *[ default_freq 0] qspi0_2x_pm 0 0 0 199999804 199999804 0 0 50000 *[ default_freq 0] qspi0_pm 0 0 0 99999902 99999902 0 0 50000 *[ default_freq 0] pll_aon 0 0 0 400000000 400000000 0 0 50000 *[ default_freq 0] can2 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] can2_core 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] can2_host 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] can1 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] can1_core 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] can1_host 0 0 0 200000000 200000000 0 0 50000 *[ default_freq 0] pll_c2 1 1 0 204000000 204000000 0 0 50000 *[ default_freq 0] axi_cbb 1 1 0 204000000 204000000 0 0 50000 *[ default_freq 0] apb2ape 1 1 0 204000000 204000000 0 0 50000 *[ default_freq 0] pll_a 1 1 0 294911718 294912000 0 0 50000 *[ default_freq 0] plla_out0 2 2 0 49151953 49152000 0 0 50000 *[ default_freq 0] i2s8 0 0 0 24575977 49151953 0 0 50000 *[ default_freq 0] i2s7 0 0 0 24575977 49151953 0 0 50000 *[ default_freq 0] i2s6 0 0 0 1535998 1536000 0 0 50000 *[ default_freq 0] i2s5 0 0 0 1535998 1536000 0 0 50000 *[ default_freq 0] i2s4 0 0 0 1535998 1536000 0 0 50000 *[ default_freq 0] i2s3 0 0 0 1535998 1536000 0 0 50000 *[ default_freq 0] i2s2 0 0 0 1535998 1536000 0 0 50000 *[ default_freq 0] i2s1 0 0 0 1404341 1411200 0 0 50000 *[ default_freq 0] dspk2 0 0 0 9830390 12288000 0 0 50000 *[ default_freq 0] dspk1 0 0 0 9830390 12288000 0 0 50000 *[ default_freq 0] dmic4 0 0 0 3071997 3072000 0 0 50000 *[ default_freq 0] dmic3 1 1 0 3071997 3072000 0 0 50000 *[ default_freq 0] dmic2 0 0 0 3071997 3072000 0 0 50000 *[ default_freq 0] dmic1 0 0 0 3071997 3072000 0 0 50000 *[ default_freq 0] aud_mclk 10 10 0 12287988 12288000 0 0 50000 *[ default_freq 0] pll_a1 1 1 0 699999609 699999609 0 0 50000 *[ default_freq 0] plla1_out1 1 1 0 174999902 174999902 0 0 50000 *[ default_freq 0] ape 2 2 0 174999902 174999902 0 0 50000 *[ default_freq 0] aclk 0 0 0 699999609 699999609 0 0 50000 *[ default_freq 0] adsp 0 0 0 699999609 699999609 0 0 50000 *[ default_freq 0] adspneon 0 0 0 699999609 699999609 0 0 50000 *[ default_freq 0] pllp_out0 13 13 0 408000000 408000000 0 0 50000 *[ default_freq 0] i2c8 1 1 0 136000000 146400000 0 0 50000 *[ default_freq 0] dsi_lp 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] nvhs_pll1_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] gbe_pll2_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] gbe_pll1_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] gbe_pll0_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] gbe_rx_byp_ref 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] spi5 0 0 0 81600000 81600000 0 0 50000 *[ default_freq 0] spi4 0 0 0 81600000 81600000 0 0 50000 *[ default_freq 0] soc_therm 0 0 0 40800000 40800000 0 0 50000 *[ default_freq 0] xusb_falcon 1 1 0 408000000 408000000 0 0 50000 *[ default_freq 0] xusb_falcon_ss 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] xusb_falcon_host 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] xusb_core_mux 2 2 0 102000000 102000000 0 0 50000 *[ default_freq 0] xusb_core_ss 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] xusb_core_host 1 1 0 102000000 102000000 0 0 50000 *[ default_freq 0] xusb_core_dev 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] nvhs_pll0_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] nvhs_rx_byp_ref 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] pex_usb_pad_pll3_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] pex_usb_pad_pll2_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] pex_usb_pad_pll1_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] pex_usb_pad_pll0_mgmt 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] pex_sata_usb_rx_byp 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] sdmmc_legacy_tm 2 2 0 12000000 12000000 0 0 50000 *[ default_freq 0] dbgapb 0 0 0 136000000 136000000 0 0 50000 *[ default_freq 0] vi_const 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] uarth 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] uartj 0 0 0 1841986 1841986 0 0 50000 *[ default_freq 0] uarti 0 0 0 1841986 1841986 0 0 50000 *[ default_freq 0] ufshc 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] uartf 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] uarte 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] uartd 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] uartb 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] uarta 0 0 0 68000000 68000000 0 0 50000 *[ default_freq 0] tsec_pka 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] spi3 0 0 0 81600000 81600000 0 0 50000 *[ default_freq 0] spi2 0 0 0 81600000 81600000 0 0 50000 *[ default_freq 0] spi1 0 0 0 81600000 81600000 0 0 50000 *[ default_freq 0] pwm8 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] pwm7 0 0 0 136000000 136000000 0 0 50000 *[ default_freq 0] pwm6 0 0 0 136000000 136000000 0 0 50000 *[ default_freq 0] pwm5 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] pwm4 0 0 0 136000000 136000000 0 0 50000 *[ default_freq 0] pwm2 0 0 0 136000000 136000000 0 0 50000 *[ default_freq 0] pwm1 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] nvcsilp 0 0 0 408000000 408000000 0 0 50000 *[ default_freq 0] uart_fst_mipi_cal 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] mipi_cal 0 0 0 102000000 102000000 0 0 50000 *[ default_freq 0] i2c9 1 1 0 136000000 136000000 0 0 50000 *[ default_freq 0] i2c7 1 1 0 136000000 136000000 0 0 50000 *[ default_freq 0] i2c6 1 1 0 136000000 136000000 0 0 50000 *[ default_freq 0] i2c4 1 1 0 136000000 136000000 0 0 50000 *[ default_freq 0] i2c3 1 1 0 136000000 146400000 0 0 50000 *[ default_freq 0] i2c2 1 1 0 136000000 136000000 0 0 50000 *[ default_freq 0] i2c1 1 1 0 136000000 146400000 0 0 50000 *[ default_freq 0] host1x 1 1 0 204000000 204000000 0 0 50000 *[ default_freq 0] extperiph4 0 0 0 51000000 51000000 0 0 50000 *[ default_freq 0] extperiph3 0 0 0 51000000 51000000 0 0 50000 *[ default_freq 0] extperiph2 0 0 0 51000000 51000000 0 0 50000 *[ default_freq 0] extperiph1 0 0 0 51000000 51000000 0 0 50000 *[ default_freq 0] aon_cpu_nic 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] aon_nic 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] aon_apb 0 0 0 204000000 204000000 0 0 50000 *[ default_freq 0] mss_encrypt 0 0 0 40800000 40800000 0 0 50000 *[ default_freq 0] ahub 2 2 0 81600000 81600000 0 0 50000 *[ default_freq 0] clk_m 3 3 0 19200000 19200000 0 0 50000 *[ default_freq 0] tach1 0 0 0 3200000 3200000 0 0 50000 *[ default_freq 0] tsense 0 0 0 2742858 2742858 0 0 50000 *[ default_freq 0] la 0 0 0 19200000 19200000 0 0 50000 *[ default_freq 0] fuse_serial 0 0 0 19200000 19200000 0 0 50000 *[ default_freq 0] ist 0 0 0 19200000 19200000 0 0 50000 *[ default_freq 0] ufsdev_ref 0 0 0 19200000 19200000 0 0 50000 *[ default_freq 0] tach0 1 1 0 1010526 1010526 0 0 50000 *[ default_freq 0] pwm3 1 1 0 4800000 5646848 0 0 50000 *[ default_freq 0] actmon 2 2 0 19200000 19200000 0 0 50000 *[ default_freq 0] clk_32k 0 0 0 32768 32768 0 0 50000 *[ default_freq 0] i2c_slow 0 0 0 32768 32768 0 0 50000 *[ default_freq 0] aon_i2c_slow 0 0 0 32768 32768 0 0 50000 *[ default_freq 0]