/*
 * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <tegra210-platforms/tegra210-camera-e3323-a00.dtsi>

#define CAM0_RST_L	TEGRA_GPIO(S, 4)
#define CAM0_PWDN		TEGRA_GPIO(S, 7)
#define CAM1_RST_L	TEGRA_GPIO(S, 5)
#define CAM1_PWDN		TEGRA_GPIO(T, 0)
/* CAM2_RST  TCA9539 - P10 */
/* CAM2_PWDN  TCA9539 - P07 */
/* CAM_AF_PWDN  TCA9539 - P13 */

/* camera control gpio definitions */

/ {
	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <8>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <600000>;
		isp_peak_byte_per_pixel = <3>;
		isp_bw_margin_pct = <25>;
	};

	host1x {
		i2c@546c0000 {
			ov23850_a@48 {
				/* Define any required hw resources needed by driver */
				/* ie. clocks, io pins, power sources */
				mclk = "cam_mclk1";
				reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;   //also for VCM_2V8 en
				pwdn-gpios = <&gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
				vana-supply = <&en_vdd_cam_hv_2v8>;
				vdig-supply = <&en_vdd_cam_1v2>;
				vif-supply = <&en_vdd_cam>;
				vvcm-suply = <&en_vdd_vcm_2v8>;
			};
			lc898212_1: lc898212@72 {
				vvcm-supply = <&en_vdd_vcm_2v8>;
			};
		};
	};

	i2c@7000c000 {
		ov23850_c@48 {
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			mclk = "cam_mclk1";
			reset-gpios = <&gpio CAM1_RST_L GPIO_ACTIVE_HIGH>;   //also for VCM_2V8 en
			pwdn-gpios = <&gpio CAM1_PWDN GPIO_ACTIVE_HIGH>;
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vdig-supply = <&en_vdd_cam_1v2>;
			vif-supply = <&en_vdd_cam>;
			vvcm-suply = <&en_vdd_vcm_2v8>;
		};
		lc898212_2: lc898212@72 {
			vvcm-supply = <&en_vdd_vcm_2v8>;
		};
	};

	gpio: gpio@6000d000 {
		camera-control {
			gpio-output-low = <
				CAM0_RST_L
				CAM0_PWDN
				CAM1_RST_L
				CAM1_PWDN
				>;
		};
	};
};