nvidia@tegra-ubuntu-embedded-tx2-1:/usr/src/linux-headers-4.4.38-tegra/tools/perf$ ll /proc/quadd/
total 0
-r--r--r--   1 root root 0 May 31 12:35 capabilities
-r--r--r--   1 root root 0 May 31 12:35 status
-r--r--r--   1 root root 0 May 31 12:35 version
dr-xr-xr-x   2 root root 0 May 31 12:35 ./
dr-xr-xr-x 322 root root 0 Jan  1  1970 ../
nvidia@tegra-ubuntu-embedded-tx2-1:/usr/src/linux-headers-4.4.38-tegra/tools/perf$ ll /dev/quadd*
crw------- 1 root root 10, 59 May 29 12:04 /dev/quadd
crw------- 1 root root 10, 58 May 29 12:04 /dev/quadd_auth
nvidia@tegra-ubuntu-embedded-tx2-1:/usr/src/linux-headers-4.4.38-tegra/tools/perf$ 

nvidia@tegra-ubuntu-embedded-tx2-1:/usr/src/linux-headers-4.4.38-tegra/tools/perf$ cat /proc/quadd/*
pmu:                                   yes
tegra 3 LP cluster:                    no
power rate samples:                    yes
arch timer is available:               yes


CPU 0
pmu arch:                  AA64 PmuV3 ARM CORTEX-A57
pmu arch version:          0
l2 cache:                  yes
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          yes
  l2_dcache_write_misses:         yes
  l2_icache_misses:               no
raw_event_mask:                   0xff

CPU 1
pmu arch:                  AA64 PmuV3 NVIDIA (Denver)
pmu arch version:          0
l2 cache:                  no
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          no
  l2_dcache_write_misses:         no
  l2_icache_misses:               no
raw_event_mask:                   0xff

CPU 2
pmu arch:                  AA64 PmuV3 NVIDIA (Denver)
pmu arch version:          0
l2 cache:                  no
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          no
  l2_dcache_write_misses:         no
  l2_icache_misses:               no
raw_event_mask:                   0xff

CPU 3
pmu arch:                  AA64 PmuV3 ARM CORTEX-A57
pmu arch version:          0
l2 cache:                  yes
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          yes
  l2_dcache_write_misses:         yes
  l2_icache_misses:               no
raw_event_mask:                   0xff

CPU 4
pmu arch:                  AA64 PmuV3 ARM CORTEX-A57
pmu arch version:          0
l2 cache:                  yes
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          yes
  l2_dcache_write_misses:         yes
  l2_icache_misses:               no
raw_event_mask:                   0xff

CPU 5
pmu arch:                  AA64 PmuV3 ARM CORTEX-A57
pmu arch version:          0
l2 cache:                  yes
  Supported events:
  cpu_cycles:                     yes
  instructions:                   yes
  branch_instructions:            no
  branch_misses:                  yes
  bus_cycles:                     no
  l1_dcache_read_misses:          yes
  l1_dcache_write_misses:         yes
  l1_icache_misses:               yes
  l2_dcache_read_misses:          yes
  l2_dcache_write_misses:         yes
  l2_icache_misses:               no
raw_event_mask:                   0xff
status:          waiting
auth:            no
all samples:     0
skipped samples: 0
version:         1.117
branch:          Dev
samples version: 41
io version:      22