# CFG Version 1.0 # This is the empty CFG files for PMIC rail configuration # This contains the PMIC commands in MB1. #define TEGRA18x_MB1_POWER_RAIL_GENERIC 1 #define TEGRA18x_MB1_POWER_RAIL_CPU 2 #define TEGRA18x_MB1_POWER_RAIL_CORE 3 #define TEGRA18x_MB1_POWER_RAIL_SRAM 4 #define TEGRA18x_MB1_POWER_RAIL_GPU 5 #define TEGRA18x_MB1_POWER_RAIL_MEMIO 6 #define TEGRA18x_MB1_POWER_RAIL_THERMAL_CONFIG 7 #define TEGRA18x_MB1_POWER_RAIL_SHUTDOWN_CONFIG 8 #define TEGRA18x_MB1_POWER_RAIL_MAX 9 pmic.major = 1; pmic.minor = 2; pmic.command-retries-count = 1; pmic.wait-before-start-bus-clear-us = 0; pmic.rail-count = 6; ######################## #GENERIC RAIL (ID = 1) DATA ############### pmic.generic.1.block-count = 3; # 1. Set PMIC MBLDP = 1, CNFGGLBL1 bit 6 = 1 pmic.generic.1.block[0].type = 1; # I2C Type pmic.generic.1.block[0].i2c-controller-id = 4; pmic.generic.1.block[0].slave-add = 0x78; # 7BIt:0x3c pmic.generic.1.block[0].reg-data-size = 8; pmic.generic.1.block[0].reg-add-size = 8; pmic.generic.1.block[0].block-delay = 10; pmic.generic.1.block[0].count = 1; pmic.generic.1.block[0].commands[0].0x00.0x40 = 0x40; # VDD_HDMI_DP_1V05 (LDO7) - Enable 1.0V pmic.generic.1.block[1].type = 1; # I2C Type pmic.generic.1.block[1].i2c-controller-id = 4; pmic.generic.1.block[1].slave-add = 0x78; # 7BIt:0x3C pmic.generic.1.block[1].reg-data-size = 8; pmic.generic.1.block[1].reg-add-size = 8; pmic.generic.1.block[1].block-delay = 10; pmic.generic.1.block[1].count = 1; pmic.generic.1.block[1].commands[0].0x31.0xFF = 0xC4; # LDO3 and LDO5 to 5mv/us # DVDD-PEX LDO8 enable and set to 1.0V pmic.generic.1.block[2].type = 1; # I2C Type pmic.generic.1.block[2].i2c-controller-id = 4; pmic.generic.1.block[2].slave-add = 0x78; # 7BIt:0x3C pmic.generic.1.block[2].reg-data-size = 8; pmic.generic.1.block[2].reg-add-size = 8; pmic.generic.1.block[2].block-delay = 10; pmic.generic.1.block[2].count = 6; pmic.generic.1.block[2].commands[0].0x2A.0x01 = 0x01; # SS_L3 pmic.generic.1.block[2].commands[1].0x2E.0x01 = 0x01; # SS_L5 pmic.generic.1.block[2].commands[2].0x34.0x01 = 0x01; # SS_L8 pmic.generic.1.block[2].commands[3].0x33.0xFF = 0xC4; pmic.generic.1.block[2].commands[4].0x34.0xFE = 0xCA; pmic.generic.1.block[2].commands[5].0x4E.0xFF = 0x61; ######################## #CORE RAIL (ID = 3) DATA ############### pmic.core.3.block-count = 3; # 1. Set 950mV voltage. pmic.core.3.block[0].type = 2; # PWM Type pmic.core.3.block[0].controller-id = 5; #GP_PWM6 pmic.core.3.block[0].source-frq-hz = 102000000; #102MHz pmic.core.3.block[0].period-ns = 2600; # 384K is period. pmic.core.3.block[0].min-microvolts = 600000; pmic.core.3.block[0].max-microvolts = 1200000; pmic.core.3.block[0].init-microvolts = 950000; pmic.core.3.block[0].enable = 1; # 2. Make GP_PWM6 pin to untristate pmic.core.3.block[1].type = 0; # MMIO TYPE pmic.core.3.block[1].block-delay = 3000; pmic.core.3.block[1].count = 1; pmic.core.3.block[1].commands[0].0x0243d0e8.0x10 = 0x0; # gp_pwm6_pl6 tristate (b4) = 0 # 3. Set LDO6 to 1.5V pmic.core.3.block[2].type = 1; # I2C Type pmic.core.3.block[2].i2c-controller-id = 4; pmic.core.3.block[2].slave-add = 0x78; # 7BIt:0x3c pmic.core.3.block[2].reg-data-size = 8; pmic.core.3.block[2].reg-add-size = 8; pmic.core.3.block[2].block-delay = 100; pmic.core.3.block[2].count = 2; pmic.core.3.block[2].commands[0].0x2F.0x3F = 0x0E; pmic.core.3.block[2].commands[1].0x2F.0xC0 = 0xC0; ######################## #CPU RAIL (ID = 2) DATA ############### pmic.cpu.2.block-count = 3; # 1. Set 800mV voltage. pmic.cpu.2.block[0].type = 2; # PWM Type pmic.cpu.2.block[0].controller-id = 6; #PWM_GP7 pmic.cpu.2.block[0].source-frq-hz = 102000000; #102MHz pmic.cpu.2.block[0].period-ns = 2600; # 384K is period. pmic.cpu.2.block[0].min-microvolts = 600000; pmic.cpu.2.block[0].max-microvolts = 1200000; pmic.cpu.2.block[0].init-microvolts = 800000; pmic.cpu.2.block[0].enable = 1; # 2. GPIO BCPU_PWR_REQ 1 pmic.cpu.2.block[1].type = 0; # MMIO TYPE pmic.cpu.2.block[1].block-delay = 3; pmic.cpu.2.block[1].count = 5; pmic.cpu.2.block[1].commands[0].0x02211080.0x3 = 0x3; # GPIO_H_ENABLE_CONFIG_04_0 bit 1:0 11 pmic.cpu.2.block[1].commands[1].0x0221108c.0x1 = 0x0; # GPIO_H_OUTPUT_CONTROL_04_0 bit 0 to 0 pmic.cpu.2.block[1].commands[2].0x02211090.0x1 = 0x1; # GPIO_H_OUTPUT_VALUE_04_0 bit 0 to 1 pmic.cpu.2.block[1].commands[3].0x0243d098.0x400 = 0x0; # PADCTL_UART_BCPU_PWR_REQ_0 bit 10 to 0 pmic.cpu.2.block[1].commands[4].0x0243d098.0x10 = 0x0; # PADCTL_UART_BCPU_PWR_REQ_0 tristate(b4)=0 # 3. Make GP_PWM7 pin to untristate pmic.cpu.2.block[2].type = 0; # MMIO TYPE pmic.cpu.2.block[2].block-delay = 3000; pmic.cpu.2.block[2].count = 1; pmic.cpu.2.block[2].commands[0].0x0243d0e0.0x10 = 0x0; # gp_pwm7_pl7 tristate (b4) = 0 ######################## SRAM/GPU RAIL (ID = 4) DATA ############### pmic.sram.4.block-count = 4; # 1. Set 950mV voltage. pmic.sram.4.block[0].type = 2; #PWM type pmic.sram.4.block[0].controller-id = 7; #Pin UART5_RX in PWM8 mode SFIO2 mode) pmic.sram.4.block[0].source-frq-hz = 102000000; #102MHz pmic.sram.4.block[0].period-ns = 2600; # 384K is period. pmic.sram.4.block[0].min-microvolts = 600000; pmic.sram.4.block[0].max-microvolts = 1200000; pmic.sram.4.block[0].init-microvolts = 950000; pmic.sram.4.block[0].enable = 1; # 2.GPIO H6 BGPU_PWR_REQ 1 pmic.sram.4.block[1].type = 0; # MMIO TYPE pmic.sram.4.block[1].count = 5; pmic.sram.4.block[1].block-delay = 10; pmic.sram.4.block[1].commands[0].0x022110c0.0x3 = 0x3; #GPIO_H_ENABLE_CONFIG_04_0 bit 1:0 11 pmic.sram.4.block[1].commands[1].0x022110cc.0x1 = 0x0; #GPIO_H_OUTPUT_CONTROL_04_0 bit 0 to 0 pmic.sram.4.block[1].commands[2].0x022110d0.0x1 = 0x1; #GPIO_H_OUTPUT_VALUE_04_0 bit 0 to 1 pmic.sram.4.block[1].commands[3].0x0243d0a8.0x400 = 0x0; #PADCTL_UART_BGPU_PWR_REQ_0 bit 10 to 0 pmic.sram.4.block[1].commands[4].0x0243d0a8.0x10 = 0x0; #PADCTL_UART_BGPU_PWR_REQ_0 tristate (b4) =0 # 3. Set GPIO2 to output HIGH, FPS mode to FPS1 and up/down slot to 7:1 pmic.sram.4.block[2].type = 1; # I2C Type pmic.sram.4.block[2].i2c-controller-id = 4; pmic.sram.4.block[2].slave-add = 0x78; # 7BIt:0x3c pmic.sram.4.block[2].reg-data-size = 8; pmic.sram.4.block[2].reg-add-size = 8; pmic.sram.4.block[2].block-delay = 3; pmic.sram.4.block[2].count = 5; pmic.sram.4.block[2].commands[0].0x38.0x08 = 0x08; pmic.sram.4.block[2].commands[1].0x38.0x02 = 0x00; pmic.sram.4.block[2].commands[2].0x38.0x01 = 0x01; pmic.sram.4.block[2].commands[3].0x40.0x04 = 0x04; pmic.sram.4.block[2].commands[4].0x55.0xFF = 0x79; # 4. Make GP_PWM8(UART5_RX) pin to untristate pmic.sram.4.block[3].type = 0; # MMIO TYPE pmic.sram.4.block[3].block-delay = 3000; pmic.sram.4.block[3].count = 1; pmic.sram.4.block[3].commands[0].0x0243d040.0x10 = 0x0; # uart5_rx_px5 tristate (b4) = 0 ######################## GPU RAIL (ID = 5) DATA ############### pmic.gpu.5.block-count = 1; # 1. GPU_PWR REQ to low to enable GPU power pmic.gpu.5.block[0].type = 0; # I2C Type pmic.gpu.5.block[0].block-delay = 1000; pmic.gpu.5.block[0].count = 1; pmic.gpu.5.block[0].commands[0].0x022110d0.0x1 = 0; #GPIO_H_OUTPUT_VALUE_04_0 bit 0 to 0 ######################## MEMIO RAIL (ID = 6) DATA ############### pmic.memio.6.block-count = 1; # 1. Clear SD0 Remote Output Voltage Sense pmic.memio.6.block[0].type = 1; # I2C Type pmic.memio.6.block[0].i2c-controller-id = 4; pmic.memio.6.block[0].slave-add = 0x78; # 7BIt:0x3c pmic.memio.6.block[0].reg-data-size = 8; pmic.memio.6.block[0].reg-add-size = 8; pmic.memio.6.block[0].block-delay = 10; pmic.memio.6.block[0].count = 2; pmic.memio.6.block[0].commands[0].0x22.0xFF = 0x40; pmic.memio.6.block[0].commands[1].0x16.0xFF = 0x2a;