... [ 14.120285] spi-tegra114 3210000.spi: Adding to iommu group 2 ... [ 14.143332] spi-tegra114 3230000.spi: Adding to iommu group 2 [ 14.145456] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.146734] spi-tegra114 3210000.spi: Command1: 0x40e09827 | Command2: 0x00000011 [ 14.147879] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000003 [ 14.149002] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0000 | FIFO_STATUS: 0x00400005 [ 14.150818] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.151973] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.154060] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.155426] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0004 | FIFO_STATUS: 0x00400005 [ 14.156709] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.157949] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.159152] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.161387] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.162762] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.164180] nvmap_heap_init: nvmap_heap_init: created heap block cache [ 14.164837] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.172509] tegra-adma 2930000.adma: Tegra210 ADMA driver registered 16 channels [ 14.173922] tegra-carveouts tegra-carveouts: vpr :dma coherent mem declare 0x00000000ce000000,704643072 [ 14.173929] tegra-carveouts tegra-carveouts: assigned reserved memory node vpr-carveout [ 14.173939] nvmap_page_pool_init: Total RAM pages: 7936870 [ 14.173943] nvmap_page_pool_init: nvmap page pool size: 992108 pages (3875 MB) [ 14.177349] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.184429] misc nvmap: created heap vpr base 0x00000000ce000000 size (688128KiB) [ 14.184698] nvmap_background_zero_thread: PP zeroing thread starting. [ 14.193053] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.201285] misc nvmap: cvsram :dma coherent mem declare 0x0000000050000000,4194304 [ 14.204770] cpu-throttle-alert cooling device registered. [ 14.205250] gpu-throttle-alert cooling device registered. [ 14.205518] aux-throttle-alert cooling device registered. [ 14.206128] hot-surface-alert cooling device registered. [ 14.207526] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.213815] misc nvmap: created heap cvsram base 0x0000000050000000 size (4096KiB) [ 14.221574] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.245315] nvadsp 2993000.adsp: Adding to iommu group 36 [ 14.251329] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.251343] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.257305] nvadsp 2993000.adsp: in probe()... [ 14.261355] irq: IRQ281: trimming hierarchy from :pmc@c360000 [ 14.266881] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.268704] nvadsp 2993000.adsp: nvadsp_app_module_probe [ 14.273607] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.318462] irq: IRQ282: trimming hierarchy from :pmc@c360000 [ 14.326826] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.344448] nct1008_nct72 4-004c: starting parse dt [ 14.347727] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.357738] nct1008_nct72 4-004c: !!!Found deprecated property!!! [ 14.362724] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.367827] nct1008_nct72 4-004c: success parsing dt [ 14.377508] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.384770] nct1008_nct72 4-004c: success in enabling tmp451 VDD rail [ 14.388096] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.433881] nct1008_nct72 4-004c: LOC shutdown limit 107 [ 14.435830] nct1008_nct72 4-004c: EXT shutdown limit 109 [ 14.441572] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.448306] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.456262] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.465803] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.471958] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.480240] nct1008_nct72 4-004c: initial LOC temp: 44000 [ 14.486589] nct1008_nct72 4-004c: initial EXT temp: 48000 [ 14.489091] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.491858] nct1008_nct72 4-004c: hi_b:-10, lo_b:128 [ 14.498161] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.498168] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.498173] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.500996] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.543916] nct1008_nct72 4-004c: nct1008_probe: initialized [ 14.557028] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.558732] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.560441] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.564862] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.572099] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.580289] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.588287] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.596433] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.603892] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.616397] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.619642] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.628068] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.635246] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.643527] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.651562] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.661686] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.666977] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.683085] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.684428] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.695024] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.700678] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.708168] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.714675] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.725658] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.730492] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.738444] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.753799] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.756274] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.762177] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.773200] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.793780] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.798590] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.799948] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.804351] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.816720] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.826380] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.827734] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.833531] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.863059] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.909515] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.910807] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.919399] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.920698] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.922000] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.923453] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.927005] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.928355] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.929744] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.931068] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.932307] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.936929] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.945088] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.956641] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.960090] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 14.968958] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 14.977570] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 14.983748] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 14.991873] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.000131] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.008045] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.015708] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.023783] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.032836] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.049598] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.051487] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.055230] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.063165] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.071358] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.078770] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.086914] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.094902] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.103320] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.110441] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.118512] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.126779] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.134671] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.142253] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.150164] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.158221] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.166584] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.173746] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.181981] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.195000] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.203170] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.203184] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.218556] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.218564] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.218647] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.234664] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.234681] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.261591] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.269452] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.277181] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.285210] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.293290] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.301131] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.309627] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.316752] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.324793] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.332956] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.340380] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.348660] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.356736] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.364575] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.372063] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.380367] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.388133] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.396247] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.404005] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.411783] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.419812] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.427925] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.435422] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.443695] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.451478] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.459855] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.467078] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.475385] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.475391] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.475470] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.498739] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.498746] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.498751] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.498823] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.530434] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.530439] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.530444] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.530526] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.562086] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.562115] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.562120] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.562195] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.578178] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.578184] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.578190] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.578263] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.578269] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.578293] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.641786] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.641865] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.641872] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.641877] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.641885] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.641941] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.641947] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.641952] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.641958] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642011] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.642018] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.642023] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.642043] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642102] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.642108] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.642113] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.642118] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642175] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.642182] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.642187] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.642192] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642247] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.642254] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.642259] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.642263] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642322] spi-tegra114 3210000.spi: ============ SPI REGISTER DUMP ============ [ 15.642328] spi-tegra114 3210000.spi: Command1: 0x40e09007 | Command2: 0x00000011 [ 15.642333] spi-tegra114 3210000.spi: DMA_CTL: 0x00000000 | DMA_BLK: 0x00000000 [ 15.642338] spi-tegra114 3210000.spi: TRANS_STAT: 0x00ff0001 | FIFO_STATUS: 0x00400005 [ 15.642437] tpm_tis_spi: probe of spi0.0 failed with error -110