// SPDX-License-Identifier: GPL-2.0-only /* * Jetson Device-tree overlay for * MCP2515 * * Copyright (c) 2020 Seeed Technology Co,Ltd - https://www.seeed.cc. * All rights reserved. * */ /dts-v1/; /plugin/; #include #include #include #include / { overlay-name = "MCP251x CAN Controller"; compatible = JETSON_COMPATIBLE; fragment@1{ target-path = "/spi@7000d400/spi@1"; __overlay__ { status = "okay"; }; }; fragment@4 { target-path = "/"; __overlay__ { clocks { mcp251x_osc: mcp251x_osc { compatible = "fixed-clock"; #clock-cells = <0x0>; clock-frequency = <8000000>; clock-accuracy = <100>; clock-output-names = "mcp251x_osc"; status = "okay"; }; }; }; }; fragment@5 { target = <&spi0>; __overlay__ { /* avoid dtc warning */ #address-cells = <1>; #size-cells = <0>; compatible = "nvidia,tegra210-spi"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pinmux>; nvidia,always-hw-cs; can0: can@0 { compatible = "microchip,mcp2515"; status = "okay"; reg = <0x0>; /* spi chip select 0 */ clocks = <&mcp251x_osc>; interrupt-parent = <&gpio>; /* GPIO13, HDR PIN22, TEGRA spi2_miso_pb5 */ interrupts = <&gpio TEGRA_GPIO(B, 5) IRQ_TYPE_LEVEL_LOW>; spi-max-frequency = <10000000>; controller-data { nvidia,enable-hw-based-cs; nvidia,cs-setup-clk-count = <0x1e>; nvidia,cs-hold-clk-count = <0x1e>; nvidia,rx-clk-tap-delay = <0x1f>; nvidia,tx-clk-tap-delay = <0x0>; }; }; }; }; fragment@10 { target = <&pinmux>; __overlay__ { spi0_pinmux: header-40pin-spi0-pinmux { /* can0 /intr */ pin22 { nvidia,pins = "spi2_miso_pb5"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pin19 { nvidia,pins = "spi1_mosi_pc0"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pin21 { nvidia,pins = "spi1_miso_pc1"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; pin23 { nvidia,pins = "spi1_sck_pc2"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; /* spi0.cs1 */ pin24 { nvidia,pins = "spi1_cs0_pc3"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; }; }; }; };