[ 15.483855] tegra-xhci tegra-xhci: Firmware File: tegra_xusb_firmware (134656 Bytes) [ 15.495041] tegra-xhci tegra-xhci: Firmware DMA Memory: dma 0x800c0000 mapped 0xf0f15000 (134656 Bytes) [ 15.507052] tegra-xhci tegra-xhci: entered tegra_xhci_probe2 --- [ 15.567596] tegra-xhci tegra-xhci: usb_create_hcd done --- [ 15.584213] tegra-xhci tegra-xhci: request mem region done --- [ 15.593223] tegra-xhci tegra-xhci: register interrupt handler done --- [ 15.601406] tegra-xhci tegra-xhci: xHCI capability registers at fde90000: [ 15.610171] tegra-xhci tegra-xhci: CAPLENGTH AND HCIVERSION 0x1000020: [ 15.617616] tegra-xhci tegra-xhci: CAPLENGTH: 0x20 [ 15.623222] tegra-xhci tegra-xhci: HCIVERSION: 0x100 [ 15.629993] tegra-xhci tegra-xhci: HCSPARAMS 1: 0x8000124 [ 15.636272] tegra-xhci tegra-xhci: Max device slots: 36 [ 15.642462] tegra-xhci tegra-xhci: Max interrupters: 1 [ 15.649771] tegra-xhci tegra-xhci: Max ports: 8 [ 15.655361] tegra-xhci tegra-xhci: HCSPARAMS 2: 0x140000fd [ 15.661643] tegra-xhci tegra-xhci: Isoc scheduling threshold: 13 [ 15.661645] tegra-xhci tegra-xhci: Maximum allowed segments in event ring: 15 [ 15.661649] tegra-xhci tegra-xhci: HCSPARAMS 3 0x400002: [ 15.661651] tegra-xhci tegra-xhci: Worst case U1 device exit latency: 2 [ 15.661654] tegra-xhci tegra-xhci: Worst case U2 device exit latency: 64 [ 15.661657] tegra-xhci tegra-xhci: HCC PARAMS 0x184f525: [ 15.661659] tegra-xhci tegra-xhci: HC generates 64 bit addresses [ 15.661662] tegra-xhci tegra-xhci: FIXME: more HCCPARAMS debugging [ 15.661665] tegra-xhci tegra-xhci: RTSOFF 0x800: [ 15.661667] tegra-xhci tegra-xhci: xHCI operational registers at fde90020: [ 15.661671] tegra-xhci tegra-xhci: USBCMD 0x0: [ 15.661673] tegra-xhci tegra-xhci: HC is being stopped [ 15.661676] tegra-xhci tegra-xhci: HC has finished hard reset [ 15.661678] tegra-xhci tegra-xhci: Event Interrupts disabled [ 15.661680] tegra-xhci tegra-xhci: Host System Error Interrupts disabled [ 15.661682] tegra-xhci tegra-xhci: HC has finished light reset [ 15.661686] tegra-xhci tegra-xhci: USBSTS 0x11: [ 15.661687] tegra-xhci tegra-xhci: Event ring is empty [ 15.661690] tegra-xhci tegra-xhci: No Host System Error [ 15.661692] tegra-xhci tegra-xhci: HC is halted [ 15.661696] tegra-xhci tegra-xhci: fde90420 port status reg = 0x2a0 [ 15.661700] tegra-xhci tegra-xhci: fde90424 port power reg = 0x0 [ 15.661703] tegra-xhci tegra-xhci: fde90428 port link reg = 0x0 [ 15.661707] tegra-xhci tegra-xhci: fde9042c port reserved reg = 0x0 [ 15.661710] tegra-xhci tegra-xhci: fde90430 port status reg = 0x2a0 [ 15.661714] tegra-xhci tegra-xhci: fde90434 port power reg = 0x0 [ 15.661717] tegra-xhci tegra-xhci: fde90438 port link reg = 0x0 [ 15.661720] tegra-xhci tegra-xhci: fde9043c port reserved reg = 0x0 [ 15.661724] tegra-xhci tegra-xhci: fde90440 port status reg = 0x202e1 [ 15.661727] tegra-xhci tegra-xhci: fde90444 port power reg = 0x0 [ 15.661730] tegra-xhci tegra-xhci: fde90448 port link reg = 0x0 [ 15.661734] tegra-xhci tegra-xhci: fde9044c port reserved reg = 0x0 [ 15.661737] tegra-xhci tegra-xhci: fde90450 port status reg = 0x2a0 [ 15.661740] tegra-xhci tegra-xhci: fde90454 port power reg = 0x0 [ 15.661743] tegra-xhci tegra-xhci: fde90458 port link reg = 0x0 [ 15.661747] tegra-xhci tegra-xhci: fde9045c port reserved reg = 0x0 [ 15.661750] tegra-xhci tegra-xhci: fde90460 port status reg = 0x2a0 [ 15.661753] tegra-xhci tegra-xhci: fde90464 port power reg = 0x0 [ 15.661756] tegra-xhci tegra-xhci: fde90468 port link reg = 0x0 [ 15.661760] tegra-xhci tegra-xhci: fde9046c port reserved reg = 0x0 [ 15.661763] tegra-xhci tegra-xhci: fde90470 port status reg = 0x2a0 [ 15.661767] tegra-xhci tegra-xhci: fde90474 port power reg = 0x0 [ 15.661770] tegra-xhci tegra-xhci: fde90478 port link reg = 0x0 [ 15.661773] tegra-xhci tegra-xhci: fde9047c port reserved reg = 0x0 [ 15.661780] tegra-xhci tegra-xhci: fde90480 port status reg = 0x2a0 [ 15.661783] tegra-xhci tegra-xhci: fde90484 port power reg = 0x0 [ 15.661787] tegra-xhci tegra-xhci: fde90488 port link reg = 0x0 [ 15.661790] tegra-xhci tegra-xhci: fde9048c port reserved reg = 0x0 [ 15.661793] tegra-xhci tegra-xhci: fde90490 port status reg = 0x2a0 [ 15.661797] tegra-xhci tegra-xhci: fde90494 port power reg = 0x0 [ 15.661801] tegra-xhci tegra-xhci: fde90498 port link reg = 0x0 [ 15.661804] tegra-xhci tegra-xhci: fde9049c port reserved reg = 0x0 [ 15.661808] tegra-xhci tegra-xhci: // Halt the HC [ 15.661819] tegra-xhci tegra-xhci: Resetting HCD [ 15.661824] tegra-xhci tegra-xhci: // Reset the HC [ 15.662281] tegra-xhci tegra-xhci: Wait for controller to be ready for doorbell rings [ 15.662285] tegra-xhci tegra-xhci: Reset complete [ 15.662288] tegra-xhci tegra-xhci: Enabling 64-bit DMA addresses. [ 15.662291] tegra-xhci tegra-xhci: Calling HCD init [ 15.662294] tegra-xhci tegra-xhci: xhci_init [ 15.662296] tegra-xhci tegra-xhci: xHCI doesn't need link TRB QUIRK [ 15.662300] tegra-xhci tegra-xhci: Supported page size register = 0x1 [ 15.662303] tegra-xhci tegra-xhci: Supported page size of 4K [ 15.662306] tegra-xhci tegra-xhci: HCD page size set to 4K [ 15.662311] tegra-xhci tegra-xhci: // xHC can handle at most 36 device slots. [ 15.662314] tegra-xhci tegra-xhci: // Setting Max device slots reg = 0x24. [ 15.662345] tegra-xhci tegra-xhci: // Device context base array address = 0x80054000 (DMA), f0ee2000 (virt) [ 15.662370] tegra-xhci tegra-xhci: Allocated command ring at eb19b1c0 [ 15.662372] tegra-xhci tegra-xhci: First segment DMA is 0x80057000 [ 15.662441] tegra-xhci tegra-xhci: // Setting command ring address to 0x24 [ 15.662454] tegra-xhci tegra-xhci: // xHC command ring deq ptr low bits + flags = @00000000 [ 15.662456] tegra-xhci tegra-xhci: // xHC command ring deq ptr high bits = @00000000 [ 15.662474] tegra-xhci tegra-xhci: // Doorbell array is located at offset 0xc00 from cap regs base addr [ 15.662478] tegra-xhci tegra-xhci: // xHCI capability registers at fde90000: [ 15.662482] tegra-xhci tegra-xhci: // @fde90000 = 0x1000020 (CAPLENGTH AND HCIVERSION) [ 15.662484] tegra-xhci tegra-xhci: // CAPLENGTH: 0x20 [ 15.662487] tegra-xhci tegra-xhci: // xHCI operational registers at fde90020: [ 15.662491] tegra-xhci tegra-xhci: // @fde90018 = 0x800 RTSOFF [ 15.662494] tegra-xhci tegra-xhci: // xHCI runtime registers at fde90800: [ 15.662507] tegra-xhci tegra-xhci: // @fde90014 = 0xc00 DBOFF [ 15.662511] tegra-xhci tegra-xhci: // Doorbell array at fde90c00: [ 15.662513] tegra-xhci tegra-xhci: xHCI runtime registers at fde90800: [ 15.662517] tegra-xhci tegra-xhci: fde90800: Microframe index = 0x0 [ 15.662527] tegra-xhci tegra-xhci: // Allocating event ring [ 15.662532] tegra-xhci tegra-xhci: TRB math tests passed. [ 15.662546] tegra-xhci tegra-xhci: // Allocated event ring segment table at 0x8005d000 [ 15.662550] tegra-xhci tegra-xhci: Set ERST to 0; private num segs = 1, virt addr = f0f3b000, dma addr = 0x8005d000 [ 15.662553] tegra-xhci tegra-xhci: // Write ERST size = 1 to ir_set 0 (some bits preserved) [ 15.662556] tegra-xhci tegra-xhci: // Set ERST entries to point to event ring. [ 15.662558] tegra-xhci tegra-xhci: // Set ERST base address for ir_set 0 = 0x8005d000 [ 15.662574] tegra-xhci tegra-xhci: // Write event ring dequeue pointer, preserving EHB bit [ 15.662576] tegra-xhci tegra-xhci: Wrote ERST address to ir_set 0. [ 15.662588] tegra-xhci tegra-xhci: Allocating 2 scratchpad buffers [ 15.664233] tegra-xhci tegra-xhci: Ext Cap fde90610, port offset = 1, count = 2, revision = 0x3 [ 15.664239] tegra-xhci tegra-xhci: Ext Cap fde90620, port offset = 3, count = 6, revision = 0x2 [ 15.664242] tegra-xhci tegra-xhci: xHCI 1.0: support USB2 software lpm [ 15.664246] tegra-xhci tegra-xhci: Found 6 USB 2.0 ports and 2 USB 3.0 ports. [ 15.664250] tegra-xhci tegra-xhci: USB 2.0 port at index 2, addr = fde90440 [ 15.664253] tegra-xhci tegra-xhci: USB 2.0 port at index 3, addr = fde90450 [ 15.664256] tegra-xhci tegra-xhci: USB 2.0 port at index 4, addr = fde90460 [ 15.664258] tegra-xhci tegra-xhci: USB 2.0 port at index 5, addr = fde90470 [ 15.664260] tegra-xhci tegra-xhci: USB 2.0 port at index 6, addr = fde90480 [ 15.664263] tegra-xhci tegra-xhci: USB 2.0 port at index 7, addr = fde90490 [ 15.664266] tegra-xhci tegra-xhci: USB 3.0 port at index 0, addr = fde90420 [ 15.664269] tegra-xhci tegra-xhci: USB 3.0 port at index 1, addr = fde90430 [ 15.664273] tegra-xhci tegra-xhci: Finished xhci_init [ 15.664276] tegra-xhci tegra-xhci: Called HCD init [ 15.664316] tegra-xhci tegra-xhci: xhci_run [ 15.664320] tegra-xhci tegra-xhci: Setting event ring polling timer [ 15.664326] tegra-xhci tegra-xhci: Command ring memory map follows: [ 15.664331] tegra-xhci tegra-xhci: @0000000080057000 00000000 00000000 00000000 00000000 [ 15.664336] tegra-xhci tegra-xhci: @0000000080057010 00000000 00000000 00000000 00000000 [ 15.664341] tegra-xhci tegra-xhci: @0000000080057020 00000000 00000000 00000000 00000000 [ 15.664345] tegra-xhci tegra-xhci: @0000000080057030 00000000 00000000 00000000 00000000 [ 15.664349] tegra-xhci tegra-xhci: @0000000080057040 00000000 00000000 00000000 00000000 [ 15.664353] tegra-xhci tegra-xhci: @0000000080057050 00000000 00000000 00000000 00000000 [ 15.664357] tegra-xhci tegra-xhci: @0000000080057060 00000000 00000000 00000000 00000000 [ 15.664361] tegra-xhci tegra-xhci: @0000000080057070 00000000 00000000 00000000 00000000 [ 15.664365] tegra-xhci tegra-xhci: @0000000080057080 00000000 00000000 00000000 00000000 [ 15.664368] tegra-xhci tegra-xhci: @0000000080057090 00000000 00000000 00000000 00000000 [ 15.664372] tegra-xhci tegra-xhci: @00000000800570a0 00000000 00000000 00000000 00000000 [ 15.664376] tegra-xhci tegra-xhci: @00000000800570b0 00000000 00000000 00000000 00000000 [ 15.664380] tegra-xhci tegra-xhci: @00000000800570c0 00000000 00000000 00000000 00000000 [ 15.664384] tegra-xhci tegra-xhci: @00000000800570d0 00000000 00000000 00000000 00000000 [ 15.664387] tegra-xhci tegra-xhci: @00000000800570e0 00000000 00000000 00000000 00000000 [ 15.664391] tegra-xhci tegra-xhci: @00000000800570f0 00000000 00000000 00000000 00000000 [ 15.664395] tegra-xhci tegra-xhci: @0000000080057100 00000000 00000000 00000000 00000000 [ 15.664398] tegra-xhci tegra-xhci: @0000000080057110 00000000 00000000 00000000 00000000 [ 15.664401] tegra-xhci tegra-xhci: @0000000080057120 00000000 00000000 00000000 00000000 [ 15.664406] tegra-xhci tegra-xhci: @0000000080057130 00000000 00000000 00000000 00000000 [ 15.664409] tegra-xhci tegra-xhci: @0000000080057140 00000000 00000000 00000000 00000000 [ 15.664414] tegra-xhci tegra-xhci: @0000000080057150 00000000 00000000 00000000 00000000 [ 15.664416] tegra-xhci tegra-xhci: @0000000080057160 00000000 00000000 00000000 00000000 [ 15.664420] tegra-xhci tegra-xhci: @0000000080057170 00000000 00000000 00000000 00000000 [ 15.664423] tegra-xhci tegra-xhci: @0000000080057180 00000000 00000000 00000000 00000000 [ 15.664426] tegra-xhci tegra-xhci: @0000000080057190 00000000 00000000 00000000 00000000 [ 15.664430] tegra-xhci tegra-xhci: @00000000800571a0 00000000 00000000 00000000 00000000 [ 15.664433] tegra-xhci tegra-xhci: @00000000800571b0 00000000 00000000 00000000 00000000 [ 15.664436] tegra-xhci tegra-xhci: @00000000800571c0 00000000 00000000 00000000 00000000 [ 15.664438] tegra-xhci tegra-xhci: @00000000800571d0 00000000 00000000 00000000 00000000 [ 15.664441] tegra-xhci tegra-xhci: @00000000800571e0 00000000 00000000 00000000 00000000 [ 15.664445] tegra-xhci tegra-xhci: @00000000800571f0 00000000 00000000 00000000 00000000 [ 15.664448] tegra-xhci tegra-xhci: @0000000080057200 00000000 00000000 00000000 00000000 [ 15.664450] tegra-xhci tegra-xhci: @0000000080057210 00000000 00000000 00000000 00000000 [ 15.664453] tegra-xhci tegra-xhci: @0000000080057220 00000000 00000000 00000000 00000000 [ 15.664456] tegra-xhci tegra-xhci: @0000000080057230 00000000 00000000 00000000 00000000 [ 15.664459] tegra-xhci tegra-xhci: @0000000080057240 00000000 00000000 00000000 00000000 [ 15.664463] tegra-xhci tegra-xhci: @0000000080057250 00000000 00000000 00000000 00000000 [ 15.664466] tegra-xhci tegra-xhci: @0000000080057260 00000000 00000000 00000000 00000000 [ 15.664468] tegra-xhci tegra-xhci: @0000000080057270 00000000 00000000 00000000 00000000 [ 15.664471] tegra-xhci tegra-xhci: @0000000080057280 00000000 00000000 00000000 00000000 [ 15.664474] tegra-xhci tegra-xhci: @0000000080057290 00000000 00000000 00000000 00000000 [ 15.664476] tegra-xhci tegra-xhci: @00000000800572a0 00000000 00000000 00000000 00000000 [ 15.664479] tegra-xhci tegra-xhci: @00000000800572b0 00000000 00000000 00000000 00000000 [ 15.664481] tegra-xhci tegra-xhci: @00000000800572c0 00000000 00000000 00000000 00000000 [ 15.664483] tegra-xhci tegra-xhci: @00000000800572d0 00000000 00000000 00000000 00000000 [ 15.664486] tegra-xhci tegra-xhci: @00000000800572e0 00000000 00000000 00000000 00000000 [ 15.664489] tegra-xhci tegra-xhci: @00000000800572f0 00000000 00000000 00000000 00000000 [ 15.664491] tegra-xhci tegra-xhci: @0000000080057300 00000000 00000000 00000000 00000000 [ 15.664494] tegra-xhci tegra-xhci: @0000000080057310 00000000 00000000 00000000 00000000 [ 15.664511] tegra-xhci tegra-xhci: @0000000080057320 00000000 00000000 00000000 00000000 [ 15.664514] tegra-xhci tegra-xhci: @0000000080057330 00000000 00000000 00000000 00000000 [ 15.664516] tegra-xhci tegra-xhci: @0000000080057340 00000000 00000000 00000000 00000000 [ 15.664519] tegra-xhci tegra-xhci: @0000000080057350 00000000 00000000 00000000 00000000 [ 15.664522] tegra-xhci tegra-xhci: @0000000080057360 00000000 00000000 00000000 00000000 [ 15.664524] tegra-xhci tegra-xhci: @0000000080057370 00000000 00000000 00000000 00000000 [ 15.664527] tegra-xhci tegra-xhci: @0000000080057380 00000000 00000000 00000000 00000000 [ 15.664530] tegra-xhci tegra-xhci: @0000000080057390 00000000 00000000 00000000 00000000 [ 15.664533] tegra-xhci tegra-xhci: @00000000800573a0 00000000 00000000 00000000 00000000 [ 15.664536] tegra-xhci tegra-xhci: @00000000800573b0 00000000 00000000 00000000 00000000 [ 15.664539] tegra-xhci tegra-xhci: @00000000800573c0 00000000 00000000 00000000 00000000 [ 15.664542] tegra-xhci tegra-xhci: @00000000800573d0 00000000 00000000 00000000 00000000 [ 15.664545] tegra-xhci tegra-xhci: @00000000800573e0 00000000 00000000 00000000 00000000 [ 15.664548] tegra-xhci tegra-xhci: @00000000800573f0 80057000 00000000 00000000 00001802 [ 15.664551] tegra-xhci tegra-xhci: Ring has not been updated [ 15.664554] tegra-xhci tegra-xhci: Ring deq = f0f37000 (virt), 0x80057000 (dma) [ 15.664557] tegra-xhci tegra-xhci: Ring deq updated 0 times [ 15.664559] tegra-xhci tegra-xhci: Ring enq = f0f37000 (virt), 0x80057000 (dma) [ 15.664561] tegra-xhci tegra-xhci: Ring enq updated 0 times [ 15.664565] tegra-xhci tegra-xhci: // xHC command ring deq ptr low bits + flags = @00000000 [ 15.664568] tegra-xhci tegra-xhci: // xHC command ring deq ptr high bits = @00000000 [ 15.664571] tegra-xhci tegra-xhci: ERST memory map follows: [ 15.664575] tegra-xhci tegra-xhci: @000000008005d000 80057400 00000000 00000040 00000000 [ 15.664578] tegra-xhci tegra-xhci: Event ring: [ 15.664581] tegra-xhci tegra-xhci: @0000000080057400 00000000 00000000 00000000 00000000 [ 15.664584] tegra-xhci tegra-xhci: @0000000080057410 00000000 00000000 00000000 00000000 [ 15.664587] tegra-xhci tegra-xhci: @0000000080057420 00000000 00000000 00000000 00000000 [ 15.664591] tegra-xhci tegra-xhci: @0000000080057430 00000000 00000000 00000000 00000000 [ 15.664594] tegra-xhci tegra-xhci: @0000000080057440 00000000 00000000 00000000 00000000 [ 15.664597] tegra-xhci tegra-xhci: @0000000080057450 00000000 00000000 00000000 00000000 [ 15.664600] tegra-xhci tegra-xhci: @0000000080057460 00000000 00000000 00000000 00000000 [ 15.664603] tegra-xhci tegra-xhci: @0000000080057470 00000000 00000000 00000000 00000000 [ 15.664606] tegra-xhci tegra-xhci: @0000000080057480 00000000 00000000 00000000 00000000 [ 15.664609] tegra-xhci tegra-xhci: @0000000080057490 00000000 00000000 00000000 00000000 [ 15.664612] tegra-xhci tegra-xhci: @00000000800574a0 00000000 00000000 00000000 00000000 [ 15.664615] tegra-xhci tegra-xhci: @00000000800574b0 00000000 00000000 00000000 00000000 [ 15.664618] tegra-xhci tegra-xhci: @00000000800574c0 00000000 00000000 00000000 00000000 [ 15.664621] tegra-xhci tegra-xhci: @00000000800574d0 00000000 00000000 00000000 00000000 [ 15.664624] tegra-xhci tegra-xhci: @00000000800574e0 00000000 00000000 00000000 00000000 [ 15.664627] tegra-xhci tegra-xhci: @00000000800574f0 00000000 00000000 00000000 00000000 [ 15.664629] tegra-xhci tegra-xhci: @0000000080057500 00000000 00000000 00000000 00000000 [ 15.664633] tegra-xhci tegra-xhci: @0000000080057510 00000000 00000000 00000000 00000000 [ 15.664637] tegra-xhci tegra-xhci: @0000000080057520 00000000 00000000 00000000 00000000 [ 15.664640] tegra-xhci tegra-xhci: @0000000080057530 00000000 00000000 00000000 00000000 [ 15.664642] tegra-xhci tegra-xhci: @0000000080057540 00000000 00000000 00000000 00000000 [ 15.664646] tegra-xhci tegra-xhci: @0000000080057550 00000000 00000000 00000000 00000000 [ 15.664649] tegra-xhci tegra-xhci: @0000000080057560 00000000 00000000 00000000 00000000 [ 15.664652] tegra-xhci tegra-xhci: @0000000080057570 00000000 00000000 00000000 00000000 [ 15.664655] tegra-xhci tegra-xhci: @0000000080057580 00000000 00000000 00000000 00000000 [ 15.664658] tegra-xhci tegra-xhci: @0000000080057590 00000000 00000000 00000000 00000000 [ 15.664661] tegra-xhci tegra-xhci: @00000000800575a0 00000000 00000000 00000000 00000000 [ 15.664665] tegra-xhci tegra-xhci: @00000000800575b0 00000000 00000000 00000000 00000000 [ 15.664667] tegra-xhci tegra-xhci: @00000000800575c0 00000000 00000000 00000000 00000000 [ 15.664670] tegra-xhci tegra-xhci: @00000000800575d0 00000000 00000000 00000000 00000000 [ 15.664674] tegra-xhci tegra-xhci: @00000000800575e0 00000000 00000000 00000000 00000000 [ 15.664677] tegra-xhci tegra-xhci: @00000000800575f0 00000000 00000000 00000000 00000000 [ 15.664679] tegra-xhci tegra-xhci: @0000000080057600 00000000 00000000 00000000 00000000 [ 15.664682] tegra-xhci tegra-xhci: @0000000080057610 00000000 00000000 00000000 00000000 [ 15.664684] tegra-xhci tegra-xhci: @0000000080057620 00000000 00000000 00000000 00000000 [ 15.664687] tegra-xhci tegra-xhci: @0000000080057630 00000000 00000000 00000000 00000000 [ 15.664691] tegra-xhci tegra-xhci: @0000000080057640 00000000 00000000 00000000 00000000 [ 15.664693] tegra-xhci tegra-xhci: @0000000080057650 00000000 00000000 00000000 00000000 [ 15.664696] tegra-xhci tegra-xhci: @0000000080057660 00000000 00000000 00000000 00000000 [ 15.664700] tegra-xhci tegra-xhci: @0000000080057670 00000000 00000000 00000000 00000000 [ 15.664703] tegra-xhci tegra-xhci: @0000000080057680 00000000 00000000 00000000 00000000 [ 15.664707] tegra-xhci tegra-xhci: @0000000080057690 00000000 00000000 00000000 00000000 [ 15.664710] tegra-xhci tegra-xhci: @00000000800576a0 00000000 00000000 00000000 00000000 [ 15.664713] tegra-xhci tegra-xhci: @00000000800576b0 00000000 00000000 00000000 00000000 [ 15.664717] tegra-xhci tegra-xhci: @00000000800576c0 00000000 00000000 00000000 00000000 [ 15.664720] tegra-xhci tegra-xhci: @00000000800576d0 00000000 00000000 00000000 00000000 [ 15.664724] tegra-xhci tegra-xhci: @00000000800576e0 00000000 00000000 00000000 00000000 [ 15.664728] tegra-xhci tegra-xhci: @00000000800576f0 00000000 00000000 00000000 00000000 [ 15.664732] tegra-xhci tegra-xhci: @0000000080057700 00000000 00000000 00000000 00000000 [ 15.664735] tegra-xhci tegra-xhci: @0000000080057710 00000000 00000000 00000000 00000000 [ 15.664738] tegra-xhci tegra-xhci: @0000000080057720 00000000 00000000 00000000 00000000 [ 15.664741] tegra-xhci tegra-xhci: @0000000080057730 00000000 00000000 00000000 00000000 [ 15.664745] tegra-xhci tegra-xhci: @0000000080057740 00000000 00000000 00000000 00000000 [ 15.664749] tegra-xhci tegra-xhci: @0000000080057750 00000000 00000000 00000000 00000000 [ 15.664752] tegra-xhci tegra-xhci: @0000000080057760 00000000 00000000 00000000 00000000 [ 15.664755] tegra-xhci tegra-xhci: @0000000080057770 00000000 00000000 00000000 00000000 [ 15.664758] tegra-xhci tegra-xhci: @0000000080057780 00000000 00000000 00000000 00000000 [ 15.664761] tegra-xhci tegra-xhci: @0000000080057790 00000000 00000000 00000000 00000000 [ 15.664763] tegra-xhci tegra-xhci: @00000000800577a0 00000000 00000000 00000000 00000000 [ 15.664766] tegra-xhci tegra-xhci: @00000000800577b0 00000000 00000000 00000000 00000000 [ 15.664769] tegra-xhci tegra-xhci: @00000000800577c0 00000000 00000000 00000000 00000000 [ 15.664773] tegra-xhci tegra-xhci: @00000000800577d0 00000000 00000000 00000000 00000000 [ 15.664777] tegra-xhci tegra-xhci: @00000000800577e0 00000000 00000000 00000000 00000000 [ 15.664780] tegra-xhci tegra-xhci: @00000000800577f0 00000000 00000000 00000000 00000000 [ 15.664783] tegra-xhci tegra-xhci: Ring has not been updated [ 15.664786] tegra-xhci tegra-xhci: Ring deq = f0f37400 (virt), 0x80057400 (dma) [ 15.664788] tegra-xhci tegra-xhci: Ring deq updated 0 times [ 15.664791] tegra-xhci tegra-xhci: Ring enq = f0f37400 (virt), 0x80057400 (dma) [ 15.664794] tegra-xhci tegra-xhci: Ring enq updated 0 times [ 15.664799] tegra-xhci tegra-xhci: ERST deq = 64'h80057400 [ 15.664802] tegra-xhci tegra-xhci: // Set the interrupt modulation register [ 15.664807] tegra-xhci tegra-xhci: // Enable interrupts, cmd = 0x4. [ 15.664816] tegra-xhci tegra-xhci: // Enabling event ring interrupter fde90820 by writing 0x2 to irq_pending [ 15.664820] tegra-xhci tegra-xhci: fde90820: ir_set[0] [ 15.664823] tegra-xhci tegra-xhci: fde90820: ir_set.pending = 0x2 [ 15.664828] tegra-xhci tegra-xhci: fde90824: ir_set.control = 0xa0 [ 15.664831] tegra-xhci tegra-xhci: fde90828: ir_set.erst_size = 0x1 [ 15.664837] tegra-xhci tegra-xhci: fde90830: ir_set.erst_base = @8005d000 [ 15.664844] tegra-xhci tegra-xhci: fde90838: ir_set.erst_dequeue = @80057400 [ 15.664847] tegra-xhci tegra-xhci: Finished xhci_run for USB2 roothub [ 15.665765] tegra-xhci tegra-xhci: set port power, actual port 0 status = 0x2a0 [ 15.665782] tegra-xhci tegra-xhci: set port power, actual port 1 status = 0x2a0 [ 15.665799] tegra-xhci tegra-xhci: set port power, actual port 2 status = 0x2a0 [ 15.665815] tegra-xhci tegra-xhci: set port power, actual port 3 status = 0x2a0 [ 15.665831] tegra-xhci tegra-xhci: set port power, actual port 4 status = 0x2a0 [ 15.665849] tegra-xhci tegra-xhci: set port power, actual port 5 status = 0x2a0 [ 15.681537] tegra-xhci tegra-xhci: usb_add_hcd done --- [ 15.681560] tegra-xhci tegra-xhci: usb_register notifier done --- o [ 15.681591] tegra-xhci tegra-xhci: // Turn on HC, cmd = 0x5. [ 15.681982] tegra-xhci tegra-xhci: Port Status Change Event for port 3 [ 15.681988] tegra-xhci tegra-xhci: handle_port_status: starting port polling. [ 15.682020] tegra-xhci tegra-xhci: Finished xhci_run for USB3 roothub [ 15.683751] tegra-xhci tegra-xhci: set port power, actual port 0 status = 0x2a0 [ 15.683767] tegra-xhci tegra-xhci: set port power, actual port 1 status = 0x2a0 [ 15.708541] tegra-xhci tegra-xhci: register interrupt handler --- [ 15.708561] tegra-xhci tegra-xhci: register interrupt handler done --- [ 15.708579] tegra-xhci tegra-xhci: register interrupt handler for padctl done --- [ 15.708588] tegra-xhci tegra-xhci: register interrupt wake handler usb2 done --- [ 15.708596] tegra-xhci tegra-xhci: register interrupt wake handler usb3 done --- [ 15.708676] tegra-xhci tegra-xhci: exit tegra_xhci_probe2 successfully --- [ 15.758317] Enter: woal_init_module [ 15.758320] wlan: Loading MWLAN driver [ 15.758322] Enter: wifi_add_dev [ 15.758526] Enter: wifi_probe [ 15.758529] Enter: wifi_set_power [ 15.758534] wifi_set_power = 1 [ 15.758537] ardbeg_wifi_power: 1 [ 15.765549] tegra-xhci tegra-xhci: get port status, actual port 0 status = 0x202e1 [ 15.765553] tegra-xhci tegra-xhci: Get port status returned 0x10101 [ 15.765579] tegra-xhci tegra-xhci: clear port connect change, actual port 0 status = 0x2e1 [ 15.765586] tegra-xhci tegra-xhci: get port status, actual port 1 status = 0x2a0 [ 15.765589] tegra-xhci tegra-xhci: Get port status returned 0x100 [ 15.765596] tegra-xhci tegra-xhci: get port status, actual port 2 status = 0x2a0 [ 15.765598] tegra-xhci tegra-xhci: Get port status returned 0x100 [ 15.765604] tegra-xhci tegra-xhci: get port status, actual port 3 status = 0x2a0 [ 15.765607] tegra-xhci tegra-xhci: Get port status returned 0x100 [ 15.765614] tegra-xhci tegra-xhci: get port status, actual port 4 status = 0x2a0 [ 15.765616] tegra-xhci tegra-xhci: Get port status returned 0x100 [ 15.765622] tegra-xhci tegra-xhci: get port status, actual port 5 status = 0x2a0 [ 15.765624] tegra-xhci tegra-xhci: Get port status returned 0x100 [ 15.783384] tegra-xhci tegra-xhci: get port status, actual port 0 status = 0x2a0 [ 15.783388] tegra-xhci tegra-xhci: Get port status returned 0x2a0 [ 15.783401] tegra-xhci tegra-xhci: get port status, actual port 1 status = 0x2a0 [ 15.783403] tegra-xhci tegra-xhci: Get port status returned 0x2a0 [ 15.865559] tegra-xhci tegra-xhci: get port status, actual port 0 status = 0x2e1 [ 15.865561] tegra-xhci tegra-xhci: Get port status returned 0x101 [ 15.865576] tegra-xhci tegra-xhci: // Ding dong! [ 15.865685] tegra-xhci tegra-xhci: Slot 1 output ctx = 0x80085000 (dma) [ 15.865701] tegra-xhci tegra-xhci: Slot 1 input ctx = 0x80092000 (dma) [ 15.865719] tegra-xhci tegra-xhci: Set slot id 1 dcbaa entry f0ee2008 to 0x80085000 [ 15.865738] tegra-xhci tegra-xhci: set port reset, actual port 0 status = 0x2f1 [ 15.871594] tegra-xhci tegra-xhci: xhci_hub_status_data: stopping port polling. [ 15.916128] tegra-xhci tegra-xhci: Port Status Change Event for port 3 [ 15.916134] tegra-xhci tegra-xhci: handle_port_status: starting port polling. [ 15.916519] tegra-xhci tegra-xhci: get port status, actual port 0 status = 0x200e03 [ 15.916522] tegra-xhci tegra-xhci: Get port status returned 0x100503 [ 15.940425] BT: Loading driver [ 15.940644] BT: Driver loaded successfully [ 15.967559] tegra-xhci tegra-xhci: clear port reset change, actual port 0 status = 0xe03 [ 15.967573] tegra-xhci tegra-xhci: Set root hub portnum to 3 [ 15.967576] tegra-xhci tegra-xhci: Set fake root hub portnum to 1 [ 15.967578] tegra-xhci tegra-xhci: udev->tt = (null) [ 15.967580] tegra-xhci tegra-xhci: udev->ttport = 0x0 [ 15.967583] tegra-xhci tegra-xhci: Slot ID 1 Input Context: [ 15.967586] tegra-xhci tegra-xhci: @f0fd8000 (virt) @80092000 (dma) 0x000000 - drop flags [ 15.967589] tegra-xhci tegra-xhci: @f0fd8004 (virt) @80092004 (dma) 0x000003 - add flags [ 15.967592] tegra-xhci tegra-xhci: @f0fd8008 (virt) @80092008 (dma) 0x000000 - rsvd2[0] [ 15.967595] tegra-xhci tegra-xhci: @f0fd800c (virt) @8009200c (dma) 0x000000 - rsvd2[1] [ 15.967598] tegra-xhci tegra-xhci: @f0fd8010 (virt) @80092010 (dma) 0x000000 - rsvd2[2] [ 15.967601] tegra-xhci tegra-xhci: @f0fd8014 (virt) @80092014 (dma) 0x000000 - rsvd2[3] [ 15.967604] tegra-xhci tegra-xhci: @f0fd8018 (virt) @80092018 (dma) 0x000000 - rsvd2[4] [ 15.967607] tegra-xhci tegra-xhci: @f0fd801c (virt) @8009201c (dma) 0x000000 - rsvd2[5] [ 15.967610] tegra-xhci tegra-xhci: @f0fd8020 (virt) @80092020 (dma) 0x000000 - rsvd64[0] [ 15.967613] tegra-xhci tegra-xhci: @f0fd8028 (virt) @80092028 (dma) 0x000000 - rsvd64[1] [ 15.967616] tegra-xhci tegra-xhci: @f0fd8030 (virt) @80092030 (dma) 0x000000 - rsvd64[2] [ 15.967618] tegra-xhci tegra-xhci: @f0fd8038 (virt) @80092038 (dma) 0x000000 - rsvd64[3] [ 15.967621] tegra-xhci tegra-xhci: Slot Context: [ 15.967624] tegra-xhci tegra-xhci: @f0fd8040 (virt) @80092040 (dma) 0x8300000 - dev_info [ 15.967627] tegra-xhci tegra-xhci: @f0fd8044 (virt) @80092044 (dma) 0x030000 - dev_info2 [ 15.967630] tegra-xhci tegra-xhci: @f0fd8048 (virt) @80092048 (dma) 0x000000 - tt_info [ 15.967633] tegra-xhci tegra-xhci: @f0fd804c (virt) @8009204c (dma) 0x000000 - dev_state [ 15.967637] tegra-xhci tegra-xhci: @f0fd8050 (virt) @80092050 (dma) 0x000000 - rsvd[0] [ 15.967639] tegra-xhci tegra-xhci: @f0fd8054 (virt) @80092054 (dma) 0x000000 - rsvd[1] [ 15.967642] tegra-xhci tegra-xhci: @f0fd8058 (virt) @80092058 (dma) 0x000000 - rsvd[2] [ 15.967645] tegra-xhci tegra-xhci: @f0fd805c (virt) @8009205c (dma) 0x000000 - rsvd[3] [ 15.967648] tegra-xhci tegra-xhci: @f0fd8060 (virt) @80092060 (dma) 0x000000 - rsvd64[0] [ 15.967651] tegra-xhci tegra-xhci: @f0fd8068 (virt) @80092068 (dma) 0x000000 - rsvd64[1] [ 15.967654] tegra-xhci tegra-xhci: @f0fd8070 (virt) @80092070 (dma) 0x000000 - rsvd64[2] [ 15.967657] tegra-xhci tegra-xhci: @f0fd8078 (virt) @80092078 (dma) 0x000000 - rsvd64[3] [ 15.967660] tegra-xhci tegra-xhci: Endpoint 00 Context: [ 15.967662] tegra-xhci tegra-xhci: @f0fd8080 (virt) @80092080 (dma) 0x000000 - ep_info [ 15.967665] tegra-xhci tegra-xhci: @f0fd8084 (virt) @80092084 (dma) 0x400026 - ep_info2 [ 15.967667] tegra-xhci tegra-xhci: @f0fd8088 (virt) @80092088 (dma) 0x80057801 - deq [ 15.967670] tegra-xhci tegra-xhci: @f0fd8090 (virt) @80092090 (dma) 0x000000 - tx_info [ 15.967673] tegra-xhci tegra-xhci: @f0fd8094 (virt) @80092094 (dma) 0x000000 - rsvd[0] [ 15.967675] tegra-xhci tegra-xhci: @f0fd8098 (virt) @80092098 (dma) 0x000000 - rsvd[1] [ 15.967678] tegra-xhci tegra-xhci: @f0fd809c (virt) @8009209c (dma) 0x000000 - rsvd[2] [ 15.967682] tegra-xhci tegra-xhci: @f0fd80a0 (virt) @800920a0 (dma) 0x000000 - rsvd64[0] [ 15.967684] tegra-xhci tegra-xhci: @f0fd80a8 (virt) @800920a8 (dma) 0x000000 - rsvd64[1] [ 15.967687] tegra-xhci tegra-xhci: @f0fd80b0 (virt) @800920b0 (dma) 0x000000 - rsvd64[2] [ 15.967690] tegra-xhci tegra-xhci: @f0fd80b8 (virt) @800920b8 (dma) 0x000000 - rsvd64[3] [ 15.967693] tegra-xhci tegra-xhci: Endpoint 01 Context: [ 15.967695] tegra-xhci tegra-xhci: @f0fd80c0 (virt) @800920c0 (dma) 0x000000 - ep_info [ 15.967697] tegra-xhci tegra-xhci: @f0fd80c4 (virt) @800920c4 (dma) 0x000000 - ep_info2 [ 15.967700] tegra-xhci tegra-xhci: @f0fd80c8 (virt) @800920c8 (dma) 0x000000 - deq [ 15.967702] tegra-xhci tegra-xhci: @f0fd80d0 (virt) @800920d0 (dma) 0x000000 - tx_info [ 15.967705] tegra-xhci tegra-xhci: @f0fd80d4 (virt) @800920d4 (dma) 0x000000 - rsvd[0] [ 15.967707] tegra-xhci tegra-xhci: @f0fd80d8 (virt) @800920d8 (dma) 0x000000 - rsvd[1] [ 15.967710] tegra-xhci tegra-xhci: @f0fd80dc (virt) @800920dc (dma) 0x000000 - rsvd[2] [ 15.967712] tegra-xhci tegra-xhci: @f0fd80e0 (virt) @800920e0 (dma) 0x000000 - rsvd64[0] [ 15.967715] tegra-xhci tegra-xhci: @f0fd80e8 (virt) @800920e8 (dma) 0x000000 - rsvd64[1] [ 15.967718] tegra-xhci tegra-xhci: @f0fd80f0 (virt) @800920f0 (dma) 0x000000 - rsvd64[2] [ 15.967721] tegra-xhci tegra-xhci: @f0fd80f8 (virt) @800920f8 (dma) 0x000000 - rsvd64[3] [ 15.967723] tegra-xhci tegra-xhci: Endpoint 02 Context: [ 15.967725] tegra-xhci tegra-xhci: @f0fd8100 (virt) @80092100 (dma) 0x000000 - ep_info [ 15.967728] tegra-xhci tegra-xhci: @f0fd8104 (virt) @80092104 (dma) 0x000000 - ep_info2 [ 15.967730] tegra-xhci tegra-xhci: @f0fd8108 (virt) @80092108 (dma) 0x000000 - deq [ 15.967733] tegra-xhci tegra-xhci: @f0fd8110 (virt) @80092110 (dma) 0x000000 - tx_info [ 15.967735] tegra-xhci tegra-xhci: @f0fd8114 (virt) @80092114 (dma) 0x000000 - rsvd[0] [ 15.967738] tegra-xhci tegra-xhci: @f0fd8118 (virt) @80092118 (dma) 0x000000 - rsvd[1] [ 15.967741] tegra-xhci tegra-xhci: @f0fd811c (virt) @8009211c (dma) 0x000000 - rsvd[2] [ 15.967743] tegra-xhci tegra-xhci: @f0fd8120 (virt) @80092120 (dma) 0x000000 - rsvd64[0] [ 15.967746] tegra-xhci tegra-xhci: @f0fd8128 (virt) @80092128 (dma) 0x000000 - rsvd64[1] [ 15.967749] tegra-xhci tegra-xhci: @f0fd8130 (virt) @80092130 (dma) 0x000000 - rsvd64[2] [ 15.967751] tegra-xhci tegra-xhci: @f0fd8138 (virt) @80092138 (dma) 0x000000 - rsvd64[3] [ 15.967755] tegra-xhci tegra-xhci: // Ding dong! [ 15.968181] tegra-xhci tegra-xhci: Successful Address Device command [ 15.968185] tegra-xhci tegra-xhci: Op regs DCBAA ptr = 0x00000080054000 [ 15.968189] tegra-xhci tegra-xhci: Slot ID 1 dcbaa entry @f0ee2008 = 0x00000080085000 [ 15.968192] tegra-xhci tegra-xhci: Output Context DMA address = 0x80085000 [ 15.968195] tegra-xhci tegra-xhci: Slot ID 1 Input Context: [ 15.968199] tegra-xhci tegra-xhci: @f0fd8000 (virt) @80092000 (dma) 0x000000 - drop flags [ 15.968203] tegra-xhci tegra-xhci: @f0fd8004 (virt) @80092004 (dma) 0x000003 - add flags [ 15.968212] tegra-xhci tegra-xhci: @f0fd8008 (virt) @80092008 (dma) 0x000000 - rsvd2[0] [ 15.968215] tegra-xhci tegra-xhci: @f0fd800c (virt) @8009200c (dma) 0x000000 - rsvd2[1] [ 15.968218] tegra-xhci tegra-xhci: @f0fd8010 (virt) @80092010 (dma) 0x000000 - rsvd2[2] [ 15.968221] tegra-xhci tegra-xhci: @f0fd8014 (virt) @80092014 (dma) 0x000000 - rsvd2[3] [ 15.968225] tegra-xhci tegra-xhci: @f0fd8018 (virt) @80092018 (dma) 0x000000 - rsvd2[4] [ 15.968227] tegra-xhci tegra-xhci: @f0fd801c (virt) @8009201c (dma) 0x000000 - rsvd2[5] [ 15.968230] tegra-xhci tegra-xhci: @f0fd8020 (virt) @80092020 (dma) 0x000000 - rsvd64[0] [ 15.968233] tegra-xhci tegra-xhci: @f0fd8028 (virt) @80092028 (dma) 0x000000 - rsvd64[1] [ 15.968236] tegra-xhci tegra-xhci: @f0fd8030 (virt) @80092030 (dma) 0x000000 - rsvd64[2] [ 15.968239] tegra-xhci tegra-xhci: @f0fd8038 (virt) @80092038 (dma) 0x000000 - rsvd64[3] [ 15.968241] tegra-xhci tegra-xhci: Slot Context: [ 15.968244] tegra-xhci tegra-xhci: @f0fd8040 (virt) @80092040 (dma) 0x8300000 - dev_info [ 15.968247] tegra-xhci tegra-xhci: @f0fd8044 (virt) @80092044 (dma) 0x030000 - dev_info2 [ 15.968250] tegra-xhci tegra-xhci: @f0fd8048 (virt) @80092048 (dma) 0x000000 - tt_info [ 15.968252] tegra-xhci tegra-xhci: @f0fd804c (virt) @8009204c (dma) 0x000000 - dev_state [ 15.968255] tegra-xhci tegra-xhci: @f0fd8050 (virt) @80092050 (dma) 0x000000 - rsvd[0] [ 15.968258] tegra-xhci tegra-xhci: @f0fd8054 (virt) @80092054 (dma) 0x000000 - rsvd[1] [ 15.968261] tegra-xhci tegra-xhci: @f0fd8058 (virt) @80092058 (dma) 0x000000 - rsvd[2] [ 15.968264] tegra-xhci tegra-xhci: @f0fd805c (virt) @8009205c (dma) 0x000000 - rsvd[3] [ 15.968267] tegra-xhci tegra-xhci: @f0fd8060 (virt) @80092060 (dma) 0x000000 - rsvd64[0] [ 15.968270] tegra-xhci tegra-xhci: @f0fd8068 (virt) @80092068 (dma) 0x000000 - rsvd64[1] [ 15.968273] tegra-xhci tegra-xhci: @f0fd8070 (virt) @80092070 (dma) 0x000000 - rsvd64[2] [ 15.968275] tegra-xhci tegra-xhci: @f0fd8078 (virt) @80092078 (dma) 0x000000 - rsvd64[3] [ 15.968277] tegra-xhci tegra-xhci: Endpoint 00 Context: [ 15.968280] tegra-xhci tegra-xhci: @f0fd8080 (virt) @80092080 (dma) 0x000000 - ep_info [ 15.968282] tegra-xhci tegra-xhci: @f0fd8084 (virt) @80092084 (dma) 0x400026 - ep_info2 [ 15.968285] tegra-xhci tegra-xhci: @f0fd8088 (virt) @80092088 (dma) 0x80057801 - deq [ 15.968287] tegra-xhci tegra-xhci: @f0fd8090 (virt) @80092090 (dma) 0x000000 - tx_info [ 15.968290] tegra-xhci tegra-xhci: @f0fd8094 (virt) @80092094 (dma) 0x000000 - rsvd[0] [ 15.968292] tegra-xhci tegra-xhci: @f0fd8098 (virt) @80092098 (dma) 0x000000 - rsvd[1] [ 15.968295] tegra-xhci tegra-xhci: @f0fd809c (virt) @8009209c (dma) 0x000000 - rsvd[2] [ 15.968297] tegra-xhci tegra-xhci: @f0fd80a0 (virt) @800920a0 (dma) 0x000000 - rsvd64[0] [ 15.968300] tegra-xhci tegra-xhci: @f0fd80a8 (virt) @800920a8 (dma) 0x000000 - rsvd64[1] [ 15.968302] tegra-xhci tegra-xhci: @f0fd80b0 (virt) @800920b0 (dma) 0x000000 - rsvd64[2] [ 15.968305] tegra-xhci tegra-xhci: @f0fd80b8 (virt) @800920b8 (dma) 0x000000 - rsvd64[3] [ 15.968307] tegra-xhci tegra-xhci: Endpoint 01 Context: [ 15.968309] tegra-xhci tegra-xhci: @f0fd80c0 (virt) @800920c0 (dma) 0x000000 - ep_info [ 15.968312] tegra-xhci tegra-xhci: @f0fd80c4 (virt) @800920c4 (dma) 0x000000 - ep_info2 [ 15.968314] tegra-xhci tegra-xhci: @f0fd80c8 (virt) @800920c8 (dma) 0x000000 - deq [ 15.968317] tegra-xhci tegra-xhci: @f0fd80d0 (virt) @800920d0 (dma) 0x000000 - tx_info [ 15.968319] tegra-xhci tegra-xhci: @f0fd80d4 (virt) @800920d4 (dma) 0x000000 - rsvd[0] [ 15.968322] tegra-xhci tegra-xhci: @f0fd80d8 (virt) @800920d8 (dma) 0x000000 - rsvd[1] [ 15.968324] tegra-xhci tegra-xhci: @f0fd80dc (virt) @800920dc (dma) 0x000000 - rsvd[2] [ 15.968327] tegra-xhci tegra-xhci: @f0fd80e0 (virt) @800920e0 (dma) 0x000000 - rsvd64[0] [ 15.968330] tegra-xhci tegra-xhci: @f0fd80e8 (virt) @800920e8 (dma) 0x000000 - rsvd64[1] [ 15.968333] tegra-xhci tegra-xhci: @f0fd80f0 (virt) @800920f0 (dma) 0x000000 - rsvd64[2] [ 15.968335] tegra-xhci tegra-xhci: @f0fd80f8 (virt) @800920f8 (dma) 0x000000 - rsvd64[3] [ 15.968338] tegra-xhci tegra-xhci: Endpoint 02 Context: [ 15.968340] tegra-xhci tegra-xhci: @f0fd8100 (virt) @80092100 (dma) 0x000000 - ep_info [ 15.968342] tegra-xhci tegra-xhci: @f0fd8104 (virt) @80092104 (dma) 0x000000 - ep_info2 [ 15.968345] tegra-xhci tegra-xhci: @f0fd8108 (virt) @80092108 (dma) 0x000000 - deq [ 15.968347] tegra-xhci tegra-xhci: @f0fd8110 (virt) @80092110 (dma) 0x000000 - tx_info [ 15.968350] tegra-xhci tegra-xhci: @f0fd8114 (virt) @80092114 (dma) 0x000000 - rsvd[0] [ 15.968353] tegra-xhci tegra-xhci: @f0fd8118 (virt) @80092118 (dma) 0x000000 - rsvd[1] [ 15.968356] tegra-xhci tegra-xhci: @f0fd811c (virt) @8009211c (dma) 0x000000 - rsvd[2] [ 15.968359] tegra-xhci tegra-xhci: @f0fd8120 (virt) @80092120 (dma) 0x000000 - rsvd64[0] [ 15.968361] tegra-xhci tegra-xhci: @f0fd8128 (virt) @80092128 (dma) 0x000000 - rsvd64[1] [ 15.968364] tegra-xhci tegra-xhci: @f0fd8130 (virt) @80092130 (dma) 0x000000 - rsvd64[2] [ 15.968367] tegra-xhci tegra-xhci: @f0fd8138 (virt) @80092138 (dma) 0x000000 - rsvd64[3] [ 15.968369] tegra-xhci tegra-xhci: Slot ID 1 Output Context: [ 15.968371] tegra-xhci tegra-xhci: Slot Context: [ 15.968373] tegra-xhci tegra-xhci: @f0696000 (virt) @80085000 (dma) 0x8300000 - dev_info [ 15.968376] tegra-xhci tegra-xhci: @f0696004 (virt) @80085004 (dma) 0x030000 - dev_info2 [ 15.968378] tegra-xhci tegra-xhci: @f0696008 (virt) @80085008 (dma) 0x000000 - tt_info [ 15.968381] tegra-xhci tegra-xhci: @f069600c (virt) @8008500c (dma) 0x10000001 - dev_state [ 15.968384] tegra-xhci tegra-xhci: @f0696010 (virt) @80085010 (dma) 0x010101 - rsvd[0] [ 15.968387] tegra-xhci tegra-xhci: @f0696014 (virt) @80085014 (dma) 0x000000 - rsvd[1] [ 15.968390] tegra-xhci tegra-xhci: @f0696018 (virt) @80085018 (dma) 0x000000 - rsvd[2] [ 15.968393] tegra-xhci tegra-xhci: @f069601c (virt) @8008501c (dma) 0x000000 - rsvd[3] [ 15.968396] tegra-xhci tegra-xhci: @f0696020 (virt) @80085020 (dma) 0x000000 - rsvd64[0] [ 15.968398] tegra-xhci tegra-xhci: @f0696028 (virt) @80085028 (dma) 0x000000 - rsvd64[1] [ 15.968401] tegra-xhci tegra-xhci: @f0696030 (virt) @80085030 (dma) 0x000000 - rsvd64[2] [ 15.968404] tegra-xhci tegra-xhci: @f0696038 (virt) @80085038 (dma) 0x000000 - rsvd64[3] [ 15.968406] tegra-xhci tegra-xhci: Endpoint 00 Context: [ 15.968408] tegra-xhci tegra-xhci: @f0696040 (virt) @80085040 (dma) 0x000001 - ep_info [ 15.968411] tegra-xhci tegra-xhci: @f0696044 (virt) @80085044 (dma) 0x400026 - ep_info2 [ 15.968413] tegra-xhci tegra-xhci: @f0696048 (virt) @80085048 (dma) 0x80057801 - deq [ 15.968416] tegra-xhci tegra-xhci: @f0696050 (virt) @80085050 (dma) 0x000000 - tx_info [ 15.968418] tegra-xhci tegra-xhci: @f0696054 (virt) @80085054 (dma) 0x000000 - rsvd[0] [ 15.968421] tegra-xhci tegra-xhci: @f0696058 (virt) @80085058 (dma) 0x12c0000 - rsvd[1] [ 15.968424] tegra-xhci tegra-xhci: @f069605c (virt) @8008505c (dma) 0x8000000 - rsvd[2] [ 15.968427] tegra-xhci tegra-xhci: @f0696060 (virt) @80085060 (dma) 0x000100 - rsvd64[0] [ 15.968430] tegra-xhci tegra-xhci: @f0696068 (virt) @80085068 (dma) 0x100000100080000 - rsvd64[1] [ 15.968433] tegra-xhci tegra-xhci: @f0696070 (virt) @80085070 (dma) 0x8300000 - rsvd64[2] [ 15.968435] tegra-xhci tegra-xhci: @f0696078 (virt) @80085078 (dma) 0x000000 - rsvd64[3] [ 15.968438] tegra-xhci tegra-xhci: Endpoint 01 Context: [ 15.968440] tegra-xhci tegra-xhci: @f0696080 (virt) @80085080 (dma) 0x000000 - ep_info [ 15.968443] tegra-xhci tegra-xhci: @f0696084 (virt) @80085084 (dma) 0x000000 - ep_info2 [ 15.968445] tegra-xhci tegra-xhci: @f0696088 (virt) @80085088 (dma) 0x000000 - deq [ 15.968448] tegra-xhci tegra-xhci: @f0696090 (virt) @80085090 (dma) 0x000000 - tx_info [ 15.968450] tegra-xhci tegra-xhci: @f0696094 (virt) @80085094 (dma) 0x000000 - rsvd[0] [ 15.968453] tegra-xhci tegra-xhci: @f0696098 (virt) @80085098 (dma) 0x000000 - rsvd[1] [ 15.968456] tegra-xhci tegra-xhci: @f069609c (virt) @8008509c (dma) 0x000000 - rsvd[2] [ 15.968458] tegra-xhci tegra-xhci: @f06960a0 (virt) @800850a0 (dma) 0x000000 - rsvd64[0] [ 15.968461] tegra-xhci tegra-xhci: @f06960a8 (virt) @800850a8 (dma) 0x000000 - rsvd64[1] [ 15.968464] tegra-xhci tegra-xhci: @f06960b0 (virt) @800850b0 (dma) 0x000000 - rsvd64[2] [ 15.968467] tegra-xhci tegra-xhci: @f06960b8 (virt) @800850b8 (dma) 0x000000 - rsvd64[3] [ 15.968469] tegra-xhci tegra-xhci: Endpoint 02 Context: [ 15.968472] tegra-xhci tegra-xhci: @f06960c0 (virt) @800850c0 (dma) 0x000000 - ep_info [ 15.968474] tegra-xhci tegra-xhci: @f06960c4 (virt) @800850c4 (dma) 0x000000 - ep_info2 [ 15.968477] tegra-xhci tegra-xhci: @f06960c8 (virt) @800850c8 (dma) 0x000000 - deq [ 15.968479] tegra-xhci tegra-xhci: @f06960d0 (virt) @800850d0 (dma) 0x000000 - tx_info [ 15.968482] tegra-xhci tegra-xhci: @f06960d4 (virt) @800850d4 (dma) 0x000000 - rsvd[0] [ 15.968484] tegra-xhci tegra-xhci: @f06960d8 (virt) @800850d8 (dma) 0x000000 - rsvd[1] [ 15.968487] tegra-xhci tegra-xhci: @f06960dc (virt) @800850dc (dma) 0x000000 - rsvd[2] [ 15.968490] tegra-xhci tegra-xhci: @f06960e0 (virt) @800850e0 (dma) 0x000000 - rsvd64[0] [ 15.968492] tegra-xhci tegra-xhci: @f06960e8 (virt) @800850e8 (dma) 0x000000 - rsvd64[1] [ 15.968495] tegra-xhci tegra-xhci: @f06960f0 (virt) @800850f0 (dma) 0x000000 - rsvd64[2] [ 15.968505] tegra-xhci tegra-xhci: @f06960f8 (virt) @800850f8 (dma) 0x000000 - rsvd64[3] [ 15.968508] tegra-xhci tegra-xhci: Internal device address = 2 [ 15.980515] tegra-xhci tegra-xhci: xhci_hub_status_data: stopping port polling. [ 15.981836] tegra-xhci tegra-xhci: Waiting for status stage event [ 15.982099] tegra-xhci tegra-xhci: Waiting for status stage event [ 15.982358] tegra-xhci tegra-xhci: Waiting for status stage event [ 15.982637] tegra-xhci tegra-xhci: add ep 0x82, slot id 1, new drop flags = 0x0, new add flags = 0x20, new slot info = 0x28300000 [ 15.982641] tegra-xhci tegra-xhci: xhci_check_bandwidth called for udev eec2e000 [ 15.982645] tegra-xhci tegra-xhci: New Input Control Context: [ 15.982649] tegra-xhci tegra-xhci: @f0fd8000 (virt) @80092000 (dma) 0x000000 - drop flags [ 15.982654] tegra-xhci tegra-xhci: @f0fd8004 (virt) @80092004 (dma) 0x000021 - add flags [ 15.982658] tegra-xhci tegra-xhci: @f0fd8008 (virt) @80092008 (dma) 0x000000 - rsvd2[0] [ 15.982662] tegra-xhci tegra-xhci: @f0fd800c (virt) @8009200c (dma) 0x000000 - rsvd2[1] [ 15.982667] tegra-xhci tegra-xhci: @f0fd8010 (virt) @80092010 (dma) 0x000000 - rsvd2[2] [ 15.982670] tegra-xhci tegra-xhci: @f0fd8014 (virt) @80092014 (dma) 0x000000 - rsvd2[3] [ 15.982674] tegra-xhci tegra-xhci: @f0fd8018 (virt) @80092018 (dma) 0x000000 - rsvd2[4] [ 15.982677] tegra-xhci tegra-xhci: @f0fd801c (virt) @8009201c (dma) 0x000000 - rsvd2[5] [ 15.982680] tegra-xhci tegra-xhci: @f0fd8020 (virt) @80092020 (dma) 0x000000 - rsvd64[0] [ 15.982683] tegra-xhci tegra-xhci: @f0fd8028 (virt) @80092028 (dma) 0x000000 - rsvd64[1] [ 15.982686] tegra-xhci tegra-xhci: @f0fd8030 (virt) @80092030 (dma) 0x000000 - rsvd64[2] [ 15.982689] tegra-xhci tegra-xhci: @f0fd8038 (virt) @80092038 (dma) 0x000000 - rsvd64[3] [ 15.982692] tegra-xhci tegra-xhci: Slot Context: [ 15.982694] tegra-xhci tegra-xhci: @f0fd8040 (virt) @80092040 (dma) 0x28300000 - dev_info [ 15.982697] tegra-xhci tegra-xhci: @f0fd8044 (virt) @80092044 (dma) 0x030000 - dev_info2 [ 15.982700] tegra-xhci tegra-xhci: @f0fd8048 (virt) @80092048 (dma) 0x000000 - tt_info [ 15.982703] tegra-xhci tegra-xhci: @f0fd804c (virt) @8009204c (dma) 0x000000 - dev_state [ 15.982706] tegra-xhci tegra-xhci: @f0fd8050 (virt) @80092050 (dma) 0x000000 - rsvd[0] [ 15.982709] tegra-xhci tegra-xhci: @f0fd8054 (virt) @80092054 (dma) 0x000000 - rsvd[1] [ 15.982712] tegra-xhci tegra-xhci: @f0fd8058 (virt) @80092058 (dma) 0x000000 - rsvd[2] [ 15.982714] tegra-xhci tegra-xhci: @f0fd805c (virt) @8009205c (dma) 0x000000 - rsvd[3] [ 15.982717] tegra-xhci tegra-xhci: @f0fd8060 (virt) @80092060 (dma) 0x000000 - rsvd64[0] [ 15.982719] tegra-xhci tegra-xhci: @f0fd8068 (virt) @80092068 (dma) 0x000000 - rsvd64[1] [ 15.982722] tegra-xhci tegra-xhci: @f0fd8070 (virt) @80092070 (dma) 0x000000 - rsvd64[2] [ 15.982725] tegra-xhci tegra-xhci: @f0fd8078 (virt) @80092078 (dma) 0x000000 - rsvd64[3] [ 15.982728] tegra-xhci tegra-xhci: Endpoint 00 Context: [ 15.982730] tegra-xhci tegra-xhci: @f0fd8080 (virt) @80092080 (dma) 0x000000 - ep_info [ 15.982733] tegra-xhci tegra-xhci: @f0fd8084 (virt) @80092084 (dma) 0x400026 - ep_info2 [ 15.982736] tegra-xhci tegra-xhci: @f0fd8088 (virt) @80092088 (dma) 0x80057801 - deq [ 15.982739] tegra-xhci tegra-xhci: @f0fd8090 (virt) @80092090 (dma) 0x000000 - tx_info [ 15.982741] tegra-xhci tegra-xhci: @f0fd8094 (virt) @80092094 (dma) 0x000000 - rsvd[0] [ 15.982744] tegra-xhci tegra-xhci: @f0fd8098 (virt) @80092098 (dma) 0x000000 - rsvd[1] [ 15.982747] tegra-xhci tegra-xhci: @f0fd809c (virt) @8009209c (dma) 0x000000 - rsvd[2] [ 15.982750] tegra-xhci tegra-xhci: @f0fd80a0 (virt) @800920a0 (dma) 0x000000 - rsvd64[0] [ 15.982752] tegra-xhci tegra-xhci: @f0fd80a8 (virt) @800920a8 (dma) 0x000000 - rsvd64[1] [ 15.982755] tegra-xhci tegra-xhci: @f0fd80b0 (virt) @800920b0 (dma) 0x000000 - rsvd64[2] [ 15.982758] tegra-xhci tegra-xhci: @f0fd80b8 (virt) @800920b8 (dma) 0x000000 - rsvd64[3] [ 15.982761] tegra-xhci tegra-xhci: Endpoint 01 Context: [ 15.982763] tegra-xhci tegra-xhci: @f0fd80c0 (virt) @800920c0 (dma) 0x000000 - ep_info [ 15.982766] tegra-xhci tegra-xhci: @f0fd80c4 (virt) @800920c4 (dma) 0x000000 - ep_info2 [ 15.982769] tegra-xhci tegra-xhci: @f0fd80c8 (virt) @800920c8 (dma) 0x000000 - deq [ 15.982772] tegra-xhci tegra-xhci: @f0fd80d0 (virt) @800920d0 (dma) 0x000000 - tx_info [ 15.982775] tegra-xhci tegra-xhci: @f0fd80d4 (virt) @800920d4 (dma) 0x000000 - rsvd[0] [ 15.982778] tegra-xhci tegra-xhci: @f0fd80d8 (virt) @800920d8 (dma) 0x000000 - rsvd[1] [ 15.982780] tegra-xhci tegra-xhci: @f0fd80dc (virt) @800920dc (dma) 0x000000 - rsvd[2] [ 15.982783] tegra-xhci tegra-xhci: @f0fd80e0 (virt) @800920e0 (dma) 0x000000 - rsvd64[0] [ 15.982786] tegra-xhci tegra-xhci: @f0fd80e8 (virt) @800920e8 (dma) 0x000000 - rsvd64[1] [ 15.982789] tegra-xhci tegra-xhci: @f0fd80f0 (virt) @800920f0 (dma) 0x000000 - rsvd64[2] [ 15.982791] tegra-xhci tegra-xhci: @f0fd80f8 (virt) @800920f8 (dma) 0x000000 - rsvd64[3] [ 15.982793] tegra-xhci tegra-xhci: Endpoint 02 Context: [ 15.982796] tegra-xhci tegra-xhci: @f0fd8100 (virt) @80092100 (dma) 0x000000 - ep_info [ 15.982798] tegra-xhci tegra-xhci: @f0fd8104 (virt) @80092104 (dma) 0x000000 - ep_info2 [ 15.982801] tegra-xhci tegra-xhci: @f0fd8108 (virt) @80092108 (dma) 0x000000 - deq [ 15.982804] tegra-xhci tegra-xhci: @f0fd8110 (virt) @80092110 (dma) 0x000000 - tx_info [ 15.982806] tegra-xhci tegra-xhci: @f0fd8114 (virt) @80092114 (dma) 0x000000 - rsvd[0] [ 15.982809] tegra-xhci tegra-xhci: @f0fd8118 (virt) @80092118 (dma) 0x000000 - rsvd[1] [ 15.982812] tegra-xhci tegra-xhci: @f0fd811c (virt) @8009211c (dma) 0x000000 - rsvd[2] [ 15.982814] tegra-xhci tegra-xhci: @f0fd8120 (virt) @80092120 (dma) 0x000000 - rsvd64[0] [ 15.982817] tegra-xhci tegra-xhci: @f0fd8128 (virt) @80092128 (dma) 0x000000 - rsvd64[1] [ 15.982820] tegra-xhci tegra-xhci: @f0fd8130 (virt) @80092130 (dma) 0x000000 - rsvd64[2] [ 15.982823] tegra-xhci tegra-xhci: @f0fd8138 (virt) @80092138 (dma) 0x000000 - rsvd64[3] [ 15.982825] tegra-xhci tegra-xhci: Endpoint 03 Context: [ 15.982827] tegra-xhci tegra-xhci: @f0fd8140 (virt) @80092140 (dma) 0x000000 - ep_info [ 15.982830] tegra-xhci tegra-xhci: @f0fd8144 (virt) @80092144 (dma) 0x000000 - ep_info2 [ 15.982832] tegra-xhci tegra-xhci: @f0fd8148 (virt) @80092148 (dma) 0x000000 - deq [ 15.982835] tegra-xhci tegra-xhci: @f0fd8150 (virt) @80092150 (dma) 0x000000 - tx_info [ 15.982837] tegra-xhci tegra-xhci: @f0fd8154 (virt) @80092154 (dma) 0x000000 - rsvd[0] [ 15.982840] tegra-xhci tegra-xhci: @f0fd8158 (virt) @80092158 (dma) 0x000000 - rsvd[1] [ 15.982843] tegra-xhci tegra-xhci: @f0fd815c (virt) @8009215c (dma) 0x000000 - rsvd[2] [ 15.982846] tegra-xhci tegra-xhci: @f0fd8160 (virt) @80092160 (dma) 0x000000 - rsvd64[0] [ 15.982849] tegra-xhci tegra-xhci: @f0fd8168 (virt) @80092168 (dma) 0x000000 - rsvd64[1] [ 15.982851] tegra-xhci tegra-xhci: @f0fd8170 (virt) @80092170 (dma) 0x000000 - rsvd64[2] [ 15.982854] tegra-xhci tegra-xhci: @f0fd8178 (virt) @80092178 (dma) 0x000000 - rsvd64[3] [ 15.982856] tegra-xhci tegra-xhci: Endpoint 04 Context: [ 15.982859] tegra-xhci tegra-xhci: @f0fd8180 (virt) @80092180 (dma) 0x070000 - ep_info [ 15.982862] tegra-xhci tegra-xhci: @f0fd8184 (virt) @80092184 (dma) 0x40003e - ep_info2 [ 15.982864] tegra-xhci tegra-xhci: @f0fd8188 (virt) @80092188 (dma) 0x80095401 - deq [ 15.982867] tegra-xhci tegra-xhci: @f0fd8190 (virt) @80092190 (dma) 0x400040 - tx_info [ 15.982869] tegra-xhci tegra-xhci: @f0fd8194 (virt) @80092194 (dma) 0x000000 - rsvd[0] [ 15.982872] tegra-xhci tegra-xhci: @f0fd8198 (virt) @80092198 (dma) 0x000000 - rsvd[1] [ 15.982875] tegra-xhci tegra-xhci: @f0fd819c (virt) @8009219c (dma) 0x000000 - rsvd[2] [ 15.982878] tegra-xhci tegra-xhci: @f0fd81a0 (virt) @800921a0 (dma) 0x000000 - rsvd64[0] [ 15.982880] tegra-xhci tegra-xhci: @f0fd81a8 (virt) @800921a8 (dma) 0x000000 - rsvd64[1] [ 15.982883] tegra-xhci tegra-xhci: @f0fd81b0 (virt) @800921b0 (dma) 0x000000 - rsvd64[2] [ 15.982886] tegra-xhci tegra-xhci: @f0fd81b8 (virt) @800921b8 (dma) 0x000000 - rsvd64[3] [ 15.982889] tegra-xhci tegra-xhci: // Ding dong! [ 15.983183] tegra-xhci tegra-xhci: SMI INTR status 0x8 [ 15.983276] tegra-xhci tegra-xhci: Completed config ep cmd [ 15.983299] tegra-xhci tegra-xhci: Output context after successful config ep cmd: [ 15.983301] tegra-xhci tegra-xhci: Slot Context: [ 15.983304] tegra-xhci tegra-xhci: @f0696000 (virt) @80085000 (dma) 0x28300000 - dev_info [ 15.983307] tegra-xhci tegra-xhci: @f0696004 (virt) @80085004 (dma) 0x030000 - dev_info2 [ 15.983310] tegra-xhci tegra-xhci: @f0696008 (virt) @80085008 (dma) 0x000000 - tt_info [ 15.983313] tegra-xhci tegra-xhci: @f069600c (virt) @8008500c (dma) 0x18000001 - dev_state [ 15.983316] tegra-xhci tegra-xhci: @f0696010 (virt) @80085010 (dma) 0x1010201 - rsvd[0] [ 15.983319] tegra-xhci tegra-xhci: @f0696014 (virt) @80085014 (dma) 0x000000 - rsvd[1] [ 15.983322] tegra-xhci tegra-xhci: @f0696018 (virt) @80085018 (dma) 0x000000 - rsvd[2] [ 15.983325] tegra-xhci tegra-xhci: @f069601c (virt) @8008501c (dma) 0x000000 - rsvd[3] [ 15.983328] tegra-xhci tegra-xhci: @f0696020 (virt) @80085020 (dma) 0x000000 - rsvd64[0] [ 15.983331] tegra-xhci tegra-xhci: @f0696028 (virt) @80085028 (dma) 0x000000 - rsvd64[1] [ 15.983334] tegra-xhci tegra-xhci: @f0696030 (virt) @80085030 (dma) 0x000000 - rsvd64[2] [ 15.983336] tegra-xhci tegra-xhci: @f0696038 (virt) @80085038 (dma) 0x000000 - rsvd64[3] [ 15.983339] tegra-xhci tegra-xhci: Endpoint 00 Context: [ 15.983341] tegra-xhci tegra-xhci: @f0696040 (virt) @80085040 (dma) 0x000001 - ep_info [ 15.983344] tegra-xhci tegra-xhci: @f0696044 (virt) @80085044 (dma) 0x400026 - ep_info2 [ 15.983347] tegra-xhci tegra-xhci: @f0696048 (virt) @80085048 (dma) 0x80057951 - deq [ 15.983350] tegra-xhci tegra-xhci: @f0696050 (virt) @80085050 (dma) 0x000000 - tx_info [ 15.983352] tegra-xhci tegra-xhci: @f0696054 (virt) @80085054 (dma) 0x1000000 - rsvd[0] [ 15.983355] tegra-xhci tegra-xhci: @f0696058 (virt) @80085058 (dma) 0x12c0000 - rsvd[1] [ 15.983358] tegra-xhci tegra-xhci: @f069605c (virt) @8008505c (dma) 0x8000000 - rsvd[2] [ 15.983360] tegra-xhci tegra-xhci: @f0696060 (virt) @80085060 (dma) 0x000100 - rsvd64[0] [ 15.983363] tegra-xhci tegra-xhci: @f0696068 (virt) @80085068 (dma) 0x100000100080000 - rsvd64[1] [ 15.983366] tegra-xhci tegra-xhci: @f0696070 (virt) @80085070 (dma) 0x8300000 - rsvd64[2] [ 15.983369] tegra-xhci tegra-xhci: @f0696078 (virt) @80085078 (dma) 0x000000 - rsvd64[3] [ 15.983371] tegra-xhci tegra-xhci: Endpoint 01 Context: [ 15.983374] tegra-xhci tegra-xhci: @f0696080 (virt) @80085080 (dma) 0x000000 - ep_info [ 15.983376] tegra-xhci tegra-xhci: @f0696084 (virt) @80085084 (dma) 0x000000 - ep_info2 [ 15.983379] tegra-xhci tegra-xhci: @f0696088 (virt) @80085088 (dma) 0x000000 - deq [ 15.983382] tegra-xhci tegra-xhci: @f0696090 (virt) @80085090 (dma) 0x000000 - tx_info [ 15.983384] tegra-xhci tegra-xhci: @f0696094 (virt) @80085094 (dma) 0x000000 - rsvd[0] [ 15.983387] tegra-xhci tegra-xhci: @f0696098 (virt) @80085098 (dma) 0x000000 - rsvd[1] [ 15.983389] tegra-xhci tegra-xhci: @f069609c (virt) @8008509c (dma) 0x000000 - rsvd[2] [ 15.983392] tegra-xhci tegra-xhci: @f06960a0 (virt) @800850a0 (dma) 0x000000 - rsvd64[0] [ 15.983395] tegra-xhci tegra-xhci: @f06960a8 (virt) @800850a8 (dma) 0x000000 - rsvd64[1] [ 15.983397] tegra-xhci tegra-xhci: @f06960b0 (virt) @800850b0 (dma) 0x000000 - rsvd64[2] [ 15.983400] tegra-xhci tegra-xhci: @f06960b8 (virt) @800850b8 (dma) 0x000000 - rsvd64[3] [ 15.983403] tegra-xhci tegra-xhci: Endpoint 02 Context: [ 15.983405] tegra-xhci tegra-xhci: @f06960c0 (virt) @800850c0 (dma) 0x000000 - ep_info [ 15.983407] tegra-xhci tegra-xhci: @f06960c4 (virt) @800850c4 (dma) 0x000000 - ep_info2 [ 15.983410] tegra-xhci tegra-xhci: @f06960c8 (virt) @800850c8 (dma) 0x000000 - deq [ 15.983412] tegra-xhci tegra-xhci: @f06960d0 (virt) @800850d0 (dma) 0x000000 - tx_info [ 15.983415] tegra-xhci tegra-xhci: @f06960d4 (virt) @800850d4 (dma) 0x000000 - rsvd[0] [ 15.983418] tegra-xhci tegra-xhci: @f06960d8 (virt) @800850d8 (dma) 0x000000 - rsvd[1] [ 15.983420] tegra-xhci tegra-xhci: @f06960dc (virt) @800850dc (dma) 0x000000 - rsvd[2] [ 15.983423] tegra-xhci tegra-xhci: @f06960e0 (virt) @800850e0 (dma) 0x000000 - rsvd64[0] [ 15.983425] tegra-xhci tegra-xhci: @f06960e8 (virt) @800850e8 (dma) 0x000000 - rsvd64[1] [ 15.983428] tegra-xhci tegra-xhci: @f06960f0 (virt) @800850f0 (dma) 0x000000 - rsvd64[2] [ 15.983431] tegra-xhci tegra-xhci: @f06960f8 (virt) @800850f8 (dma) 0x000000 - rsvd64[3] [ 15.983434] tegra-xhci tegra-xhci: Endpoint 03 Context: [ 15.983436] tegra-xhci tegra-xhci: @f0696100 (virt) @80085100 (dma) 0x000000 - ep_info [ 15.983438] tegra-xhci tegra-xhci: @f0696104 (virt) @80085104 (dma) 0x000000 - ep_info2 [ 15.983441] tegra-xhci tegra-xhci: @f0696108 (virt) @80085108 (dma) 0x000000 - deq [ 15.983444] tegra-xhci tegra-xhci: @f0696110 (virt) @80085110 (dma) 0x000000 - tx_info [ 15.983447] tegra-xhci tegra-xhci: @f0696114 (virt) @80085114 (dma) 0x000000 - rsvd[0] [ 15.983450] tegra-xhci tegra-xhci: @f0696118 (virt) @80085118 (dma) 0x000000 - rsvd[1] [ 15.983453] tegra-xhci tegra-xhci: @f069611c (virt) @8008511c (dma) 0x000000 - rsvd[2] [ 15.983455] tegra-xhci tegra-xhci: @f0696120 (virt) @80085120 (dma) 0x000000 - rsvd64[0] [ 15.983458] tegra-xhci tegra-xhci: @f0696128 (virt) @80085128 (dma) 0x000000 - rsvd64[1] [ 15.983460] tegra-xhci tegra-xhci: @f0696130 (virt) @80085130 (dma) 0x000000 - rsvd64[2] [ 15.983463] tegra-xhci tegra-xhci: @f0696138 (virt) @80085138 (dma) 0x000000 - rsvd64[3] [ 15.983465] tegra-xhci tegra-xhci: Endpoint 04 Context: [ 15.983467] tegra-xhci tegra-xhci: @f0696140 (virt) @80085140 (dma) 0x070001 - ep_info [ 15.983471] tegra-xhci tegra-xhci: @f0696144 (virt) @80085144 (dma) 0x40003e - ep_info2 [ 15.983473] tegra-xhci tegra-xhci: @f0696148 (virt) @80085148 (dma) 0x80095401 - deq [ 15.983476] tegra-xhci tegra-xhci: @f0696150 (virt) @80085150 (dma) 0x400040 - tx_info [ 15.983478] tegra-xhci tegra-xhci: @f0696154 (virt) @80085154 (dma) 0x000000 - rsvd[0] [ 15.983481] tegra-xhci tegra-xhci: @f0696158 (virt) @80085158 (dma) 0x32c0000 - rsvd[1] [ 15.983484] tegra-xhci tegra-xhci: @f069615c (virt) @8008515c (dma) 0x8000000 - rsvd[2] [ 15.983486] tegra-xhci tegra-xhci: @f0696160 (virt) @80085160 (dma) 0x20000100 - rsvd64[0] [ 15.983489] tegra-xhci tegra-xhci: @f0696168 (virt) @80085168 (dma) 0x100000100080000 - rsvd64[1] [ 15.983492] tegra-xhci tegra-xhci: @f0696170 (virt) @80085170 (dma) 0x28300000 - rsvd64[2] [ 15.983495] tegra-xhci tegra-xhci: @f0696178 (virt) @80085178 (dma) 0x000000 - rsvd64[3] [ 15.983509] tegra-xhci tegra-xhci: Endpoint 0x82 not halted, refusing to reset. [ 15.983843] tegra-xhci tegra-xhci: xhci_check_bandwidth called for udev eec2e000 [ 15.984253] tegra-xhci tegra-xhci: Stalled endpoint [ 15.984256] tegra-xhci tegra-xhci: Cleaning up stalled endpoint ring [ 15.984259] tegra-xhci tegra-xhci: Finding segment containing stopped TRB. [ 15.984261] tegra-xhci tegra-xhci: Finding endpoint context [ 15.984264] tegra-xhci tegra-xhci: Finding segment containing last TRB in TD. [ 15.984266] tegra-xhci tegra-xhci: Cycle state = 0x1 [ 15.984269] tegra-xhci tegra-xhci: New dequeue segment = eee8b380 (virtual) [ 15.984271] tegra-xhci tegra-xhci: New dequeue pointer = 0x800579c0 (DMA) [ 15.984273] tegra-xhci tegra-xhci: Queueing new dequeue state [ 15.984277] tegra-xhci tegra-xhci: Set TR Deq Ptr cmd, new deq seg = eee8b380 (0x80057800 dma), new deq ptr = f0f379c0 (0x800579c0 dma), ne1 [ 15.984279] tegra-xhci tegra-xhci: // Ding dong! [ 15.984285] tegra-xhci tegra-xhci: Giveback URB eeefbbc0, len = 0, expected = 26, status = -32 [ 15.984337] tegra-xhci tegra-xhci: WARN halted endpoint, queueing URB anyway. [ 15.984484] tegra-xhci tegra-xhci: Ignoring reset ep completion code of 1 [ 15.984660] tegra-xhci tegra-xhci: Successful Set TR Deq Ptr cmd, deq = @800579c1 [ 16.733862] tegra-xhci tegra-xhci: Cancel URB eeefb9c0, dev 1, ep 0x82, starting at offset 0x80095400 [ 16.733867] tegra-xhci tegra-xhci: // Ding dong! [ 16.734416] tegra-xhci tegra-xhci: Stopped on Transfer TRB [ 16.734482] tegra-xhci tegra-xhci: Removing canceled TD starting at 0x80095400 (dma). [ 16.734486] tegra-xhci tegra-xhci: Finding segment containing stopped TRB. [ 16.734488] tegra-xhci tegra-xhci: Finding endpoint context [ 16.734491] tegra-xhci tegra-xhci: Finding segment containing last TRB in TD. [ 16.734494] tegra-xhci tegra-xhci: Cycle state = 0x1 [ 16.734496] tegra-xhci tegra-xhci: New dequeue segment = edde6680 (virtual) [ 16.734499] tegra-xhci tegra-xhci: New dequeue pointer = 0x80095410 (DMA) [ 16.734503] tegra-xhci tegra-xhci: Set TR Deq Ptr cmd, new deq seg = edde6680 (0x80095400 dma), new deq ptr = f0fda410 (0x80095410 dma), ne1 [ 16.734506] tegra-xhci tegra-xhci: // Ding dong! [ 16.734712] tegra-xhci tegra-xhci: Successful Set TR Deq Ptr cmd, deq = @80095411 [ 16.883974] [ 17.208634] tegra-xhci tegra-xhci: SMI INTR status 0x8 [ 17.781537] tegra-xhci tegra-xhci: set port remote wake mask, actual port 0 status = 0xe0002a0 [ 17.781557] tegra-xhci tegra-xhci: set port remote wake mask, actual port 1 status = 0xe0002a0 [ 17.781577] tegra-xhci tegra-xhci: tegra_xhci_bus_suspend: usb3 root hub [ 17.781601] tegra-xhci tegra-xhci: xhci_hub_status_data: stopping port polling. [ 18.734534] tegra-xhci tegra-xhci: // Ding dong! [ 18.734869] tegra-xhci tegra-xhci: Stopped on No-op or Link TRB [ 20.756535] tegra-xhci tegra-xhci: tegra_xhci_bus_suspend: usb2 root hub [ 20.757189] tegra-xhci tegra-xhci: xhci_suspend: stopping port polling. [ 20.757204] tegra-xhci tegra-xhci: // Setting command ring address to 0x80057001 [ 20.758921] tegra-xhci tegra-xhci: @fde90420 port 0 status reg = 0xa0002a0 [ 20.758925] tegra-xhci tegra-xhci: @fde90430 port 1 status reg = 0xa0002a0 [ 20.758929] tegra-xhci tegra-xhci: @fde90440 port 2 status reg = 0xc000e63 [ 20.758932] tegra-xhci tegra-xhci: @fde90450 port 3 status reg = 0xa0002a0 [ 20.758936] tegra-xhci tegra-xhci: @fde90460 port 4 status reg = 0xa0002a0 [ 20.758940] tegra-xhci tegra-xhci: @fde90470 port 5 status reg = 0xa0002a0 [ 20.758943] tegra-xhci tegra-xhci: @fde90480 port 6 status reg = 0xa0002a0 [ 20.758947] tegra-xhci tegra-xhci: @fde90490 port 7 status reg = 0xa0002a0 [ 20.764123] tegra-xhci tegra-xhci: tegra_xhci_host_elpg_entry: PMC_UTMIP_UHSIC_SLEEP_CFG_0 = c0ffffff [ 20.764297] tegra-xhci tegra-xhci: tegra_xhci_host_elpg_entry: PMC_UTMIP_UHSIC_SLEEP_CFG_0 = c0ffffff [ 20.764302] tegra-xhci tegra-xhci: tegra_xhci_host_elpg_entry: HOST POWER STATUS = 0 [ 20.764316] tegra-xhci tegra-xhci: xhci_hub_status_data: stopping port polling.