Hi Nvidia Teams. We are trying to use 40pin hdr gpio (PZ.03~PZ.07) , and there is something weird on GPIO behavier. Here is our step : use same pinmux setting as devkit does ( gpio input) [image] check register status after system boot-up (all pin is input ) register show bit[10]=0 , bit[…

This issue may affect to control GPIO in JP6. We have an official patch to fix this issue as following: diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index 953a3a650a9e..7022faa2a7ce 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinct…

40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6

Robotics & Edge Computing Jetson Systems Jetson AGX Orin

system Closed September 11, 2024, 7:13am 19

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Jetson Orin Nano (GPIO) -> with gpioset and gpioget

Orin Nano GPIO Not Working When Using gpioset (PG.06 / GPIO07)

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40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6

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