Because of what I said here:
This is a basic CUDA principle. You must compile for a compatible architecture. cc8.x compilation target is not a compatible architecture to run on a cc7.0 device.
It would be like if you specified a CPU compilation target of a sandy bridge architecture but tried to run that code on a nehalem device. It may/probably won’t work. You’ll get an illegal instruction trap or something similar.
when you compile for a cc8.0 architecture, you are generating cc8.0 machine code. cc8.0 machine code cannot/will not run on a cc7.0 device. and the error message you will get is likely to be:
Let me state it differently. cc7.0 does not support TF32. How do you expect to run a CUDA code that requires TF32 on a cc7.0 device?
Just because you can compile that code for a device other than cc7.0, does not mean you can run it on a cc7.0 device.