Constant Cache

Hi,

I would like to know the Constant Memory cache size for the Pascal & Volta Architecture

More specifically we have been working on Tegra TX2 & P5000

I checked some documents. But I could not find the details.
Kindly share the details.

The logical constant space is 64KB.

With respect to the cache, the size and structure of the cache is unpublished (by NVIDIA) AFAIK. A reasonable expectation is that the logical constant space is delivered through a cache on the order of 8KB per SM.

http://www.acceleware.com/blog/constant-cache-vs-read-only-cache

So, can I assume there is no specialized physical space for the constant memory, it just a logical space residing in device RAM in the same way as the global memory?

Yes. They physical backing for the constant logical space is GPU DRAM memory. The constant memory system consists of this physical backing, plus a per-SM constant cache resource.

Unfortunately it seems that acceleware has relocated or removed the link I used previously.

The answer here from Greg Smith also refers to an 8KB “working set size”:

https://stackoverflow.com/questions/10256402/why-is-the-constant-memory-size-limited-in-cuda

Thanks a lot!