I am trying to modify the devicetree on my Jetson AGX Xavier in order to get Arm CoreSight running. The Xavier SoC manual shows the clocks (CSITE, DBGAPB, …) that the CoreSight devices use (see screenshot). I expected to find these somewhere in the dt-bindings from the kernel sources (in hardware/nvidia/soc/t19x/galen/dt-bindings/clock/tegra194-clk.h to be exact), but they are not there. Where can I find the clocks?
This has nothing to do with Arm DSTREAM or Arm Development Studio. I am not using these.
My problem is that the DEVICETREE of the AGX Xavier lacks code that the other Jetson devices have.
For example: The Jetson Nano Devicetree (Tegra210 SoC) includes a file called “tegra210-car.h” which contains all the clocks of the Jetson Nano (see 1st attachment).
This is from the BSP kernel sources for the L4T release (32.7.5 in that case), located at Linux_for_Tegra/source/hardware/nvidia/soc/tegra/kernel-include/dt-bindings/clock/.
For the devicetree modification that I plan to do on the AGX Xavier, I would need the clocks called “CLK_DBGAPB” and “CLK_CSITE”, just like the ones in “tegra210-car.h”.
One would assume that these are located in similar to the Jetson Nano at Linux_for_Tegra/source/hardware/nvidia/soc/t19x/kernel-include/dt-bindings/clock/tegra194-clk.h (see 2nd attachment).
However, the two clocks are not in there, and I cannot find these anywhere else in the sources.
I guess the Nvidia Developers who wrote this file are the only ones who can answer my question. tegra210-car.h.txt (16.4 KB) tegra194-clk.h.txt (33.3 KB)
did you read my previous post?! I do not have Arm DSTREAM (it costs ~$3000 by the way) and my problem is a completely different topic! What I am trying to do is fixing the devicetree, which has something to do with the Linux kernel, not some debugging tool.
You are completely missing the topic again…
There is no issue, the AGX Xavier works normal.
What I want to do is using the Arm CoreSight hardware that is integrated into the Xavier SoC. To activate the CoreSight functionality, I have to
Recompile the kernel with the CoreSight drivers included and
Add nodes for each CoreSight component to the devicetree
Step 2 is where I am stuck because the devicetree is missing source code to make the CoreSight components work properly. I already explained the reason why it does not work and what is missing to make it work in my 1st and 2nd post to this thread.
Apart from not being able to use the CoreSight components, my AGX Xavier Devkit works completely fine.
There should be methods to use CoreSight on the command line. E.g. using the perf tool or directly interacting with the CoreSight components via sysfs (like in this guide for older Jetson devices)
However, this would require the CoreSight clocks for the devicetree, which is why I started this thread in the first place!
Hi,
We have checked and confirmed Program Trace Macrocell (PTM) is not supported on Xavier. Is still checking whether there is a way to run CoreSight without DS-5.
Yes, this is also remarked in the Xavier SoC TRM. No core PTMs or ETMs, unfortunately.
However, the Xavier should support the System Trace Macrocell (STM).
Using the STM without DS-5 would be similar to the guide I linked earlier.
Either way, I still need the CoreSight clocks (CSITE, DBGAPB) for the devicetree to make the CoreSight devices work.
It’s been 2 months now… The customer support in this forum is just terrible.
I will stop trying to use CoreSight on the AGX Xavier and keep my focus on the Nano.
Hi,
Since we mainly use ARM DS, no much experience in the without-ARM-DS setup. The teams are still checking it and would need some time. We still would like to suggest use ARM DS.
Like I said, Arm DS is no option for me. But I still highly doubt that CoreSight works with DS without the driver and devicetree modifications that I was asking about earlier in this thread. Arm DS is a high-level development tool that could not work without proper kernel-level modifications.
You telling me to use Arm DS bothers me for 2 reasons:
In Arm CoreSight ETM Tracing not working, I was just following the instructions on how to use CoreSight from the Nvidia Developer Documentation. This is entirely without DS! So why would the Nvidia developers who worked on this even write it into the documentation if they use DS instead?! This would make no sense at all (especially if the instructions don’t even work!!)
In Arm CoreSight tracing with Nvidia driver, I was using a (slightly modified) driver that Nvidia developed only for the reason to set up CoreSight. Again, why would the Nvidia Developers even bother writing code for this driver if they use DS instead?!
Hmm, think about it…
Or could it actually be that DS alone is not enough for using CoreSight? 🤔🤔
By now, I have no interest anymore in trying to set up Coresight on the Xavier. So I will close this thread if you have no further remarks.
However, I am still very much interested in finding a solution to the other 2 topics, which deal with the Jetson Nano. If you have something to add about these, please answer there.