GPIO to SFIO 28.1

Hi, all.

Has the GPIO to SFIO command (gpio-to-sfio) been replaced? I’m trying to implement the following under L4T 28.1 http://elinux.org/Jetson/TX1_SPI#Patching_the_New_DTS but I’m having trouble setting the pins for use with SPI. For context I’m building the sources/kernel/device tree on a Host machine, and not on the Target directly.

gpio@6000d000 {
		compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
		reg = <0x0 0x6000d000 0x0 0x1000>;
		interrupts = <0x0 0x20 0x4 0x0 0x21 0x4 0x0 0x22 0x4 0x0 0x23 0x4 0x0 0x37 0x4 0x0 0x57 0x4 0x0 0x59 0x4 0x0 0x7d 0x4>;
		#gpio-cells = <0x2>;
		gpio-controller;
		#interrupt-cells = <0x2>;
		interrupt-controller;
		gpio-ranges = <0x50 0x0 0x0 0xf6>;
		status = "okay";
		gpio-init-1 = <0x51>;
		linux,phandle = <0x6a>;
		phandle = <0x6a>; 

		..
                ..
		gpio_default: default {
			gpio-to-sfio = <16 17 18 19 20>;
		};
};

Thanks,

David.

Hi david:

The code support “gpio-to-sfio” is deleted in gpiolib-of.c.

Now to enable sfio, see this:

https://devtalk.nvidia.com/default/topic/1021992/jetson-tx1/how-to-enable-spi-port-on-the-jetson-tx1-with-r28-1-/?offset=3#5201369

It work.
gpio: gpio@6000d000{
        compatible = "nvidia, tegra210-gpio", "....."
        reg = <0x0 0x6000d000 0x0 0x1000>;
        interrupts = < 0 32 0x04
                       0 33 0x04
                       0 34 0x04
                       0 35 0x04
                       0 55 0x04
                       0 87 0x04
                       0 89 0x04
                       0 125 0x04
        #gpio-cells = <2>;
        gpio-controller; 
        #interrupt-cells = <2>;
        interrupt-controller;
        gpio-ranges = <&pinmux 0 0 246>;
        status = "disabled";

        gpio_default: default{
            gpios = <TEGRA_GPIO(C, 0) 0 TEGRA_GPIO(C, 1) 0 TEGRA_GPIO(C, 2) 0 TEGRA_GPIO(C, 3) 0 TEGRA_GPIO(C, 4) 0>;

I’ve also tried:

gpios = <TEGRA_GPIO(C, 0) 1 TEGRA_GPIO(C, 1) 1 TEGRA_GPIO(C, 2) 1 TEGRA_GPIO(C, 3) 1 TEGRA_GPIO(C, 4) 1>;

On both instances (and some slight variations) the /sys/kernel/debug/ $cat tegra_gpio still shows ‘0x1f’ in {Name, Bank, Port} C: 0:2

I have confirmed that the above changes (gpio_default…) is in the DTB on the Target device.

@zhili_liu - Have you done anything different to what I’m doign?

Thanks,

David.

Solution
http://elinux.org/Jetson/TX1_SPI on L4t 28.81

add the following to

gpio: gpio@6000d000{
      ...
      ...
      status = "disabled"
      ...
      gpio_default: default{
           gpio-hog;
           function;
           gpios = <TEGRA_GPIO(C, 0) 0 TEGRA_GPIO(C, 1) 0 TEGRA_GPIO(C, 2) 0 TEGRA_GPIO(C, 3) TEGRA_GPIO(C,
 4) 0>;
};
...
};

This causes tegra_gpio /sys/kernel/debug $ cat tegra_gpio to show 0x00 in bank C:0 which initially it was 0x1F as described in http://elinux.org/Jetson/TX1_SPI section Configuring GPIO Pinmux for SPI

@zhili_liu
I have added the code to my device tree

gpio@6000d000 {
		compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
		reg = <0x0 0x6000d000 0x0 0x1000>;
		interrupts = <0x0 0x20 0x4 0x0 0x21 0x4 0x0 0x22 0x4 0x0 0x23 0x4 0x0 0x37 0x4 0x0 0x57 0x4 0x0 0x59 0x4 0x0 0x7d 0x4>;
		#gpio-cells = <0x2>;
		gpio-controller;
		#interrupt-cells = <0x2>;
		interrupt-controller;
		gpio-ranges = <0x5f 0x0 0x0 0xf6>;
		<b>status = "okay";</b>
		linux,phandle = <0x7b>;
		phandle = <0x7b>;

		wlan-default-input {
			gpio-hog;
			input;
			gpios = <0x3a 0x0 0x41 0x0>;
			label = "wlan-default-input-h2", "wlan-default-input-i1";
		};

		wlan-default-output-high {
			gpio-hog;
			output-high;
			gpios = <0x38 0x0 0x40 0x0>;
			label = "wlan-default-output-high-h0", "wlan-default-output-high-i0";
		};

		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <0x94 0x0 0x97 0x0>;
			label = "cam0-rst", "cam0-pwdn";
		};

		e2614-rt5658-audio {
			gpio-hog;
			function;
			gpios = <0x8 0x0 0x9 0x0 0xa 0x0 0xb 0x0 0xd8 0x0 0xdb 0x0>;
			label = "I2S0_LRCLK", "I2S0_SDIN", "I2S0_SDOUT", "I2S0_CLK", "AUDIO_MCLK", "AUD_RST";
			status = "disabled";
			linux,phandle = <0xd2>;
			phandle = <0xd2>;
		};

		[b]default {
			gpio-hog;
			function;
			gpios = <0x10 0x0 0x11 0x0 0x12 0x0 0x13 0x14 0x0>;
		};[/b]
	};

but I cat /sys/kernel/debug/tegra_gpio

nvidia@tegra-ubuntu:~$ sudo cat /sys/kernel/debug/tegra_gpio                    
[sudo] password for nvidia:                                                     
0:0 24 00 00 04 00 00 000000                                                    
0:1 0f 00 00 0f 00 00 000000                                                    
0:2 1f 00 00 18 00 00 000000                                                    
0:3 00 00 00 00 00 00 000000                                                    
1:0 70 00 00 60 00 00 000000                                                    
1:1 00 00 00 00 00 00 000000                                                    
1:2 00 00 00 00 00 00 000000                                                    
1:3 ff 1b 0b 40 00 24 002024                                                    
2:0 0f 0d 01 02 00 00 000000                                                    
2:1 00 00 00 00 00 00 000000                                                    
2:2 f0 20 00 d0 00 00 000000                                                    
2:3 02 00 00 02 00 00 000000                                                    
3:0 00 00 00 00 00 00 000000                                                    
3:1 00 00 00 00 00 00 000000                                                    
3:2 00 00 00 00 00 00 000000                                                    
3:3 00 00 00 00 00 00 000000                                                    
4:0 00 00 00 00 00 00 000000                                                    
4:1 00 00 00 00 00 00 000000                                                    
4:2 f0 f0 80 00 00 00 000000                                                    
4:3 03 03 00 00 00 00 000000                                                    
5:0 0c 00 00 08 00 00 000000                                                    
5:1 6e 66 00 00 00 00 000000                                                    
5:2 00 00 00 00 00 00 000000                                                    
5:3 ff 00 00 ff 00 70 606000                                                    
6:0 03 00 00 03 00 01 010100                                                    
6:1 1f 08 00 17 00 03 030300                                                    
6:2 00 00 00 00 00 00 000000                                                    
6:3 0d 04 00 00 00 00 000000                                                    
7:0 32 00 00 32 00 02 020200                                                    
7:1 00 00 00 00 00 00 000000                                                    
7:2 00 00 00 00 00 00 000000                                                    
7:3 00 00 00 00 00 00 000000

It still 1f.
How do you solve this problem?

Lost a zero try to add it back to try

gpios = <0x10 0x0 0x11 0x0 0x12 0x0 0x13 0x14 0x0>;

default {
			gpio-hog;
			function;
			gpios = <0x10 0x0 0x11 0x0 0x12 0x0 0x13 0x14 0x0>; //incorrect 

		};

//should be 
		default {
			gpio-hog;
			function;
			gpios = <0x10 0x0 0x11 0x0 0x12 0x0 0x13 00 0x14 0x0>;

		};

Oh,i got it.
Stupid mistakes.
Thanks a lot

What is the full name of “SFIO”. And what is the difference between GPIO & SFIO.

I find out there is a extra bit there for swtich a PIN behave as a GPIO or SFIO.Hier

The TRM describes this (sorry, it is long reading). Basically:
SFIO: Special Function I/O. Basically a dedicated function within the SoC.
GPIO: General Purpose I/O. Can be used for most anything.

Thank you very much, I may got all I needed!

BTW: In my Observation, I’ve figured out that gpio256 (under Linux, signal name: GPIO08) is set as SFIO as default. If I export it and use it as a normal GPIO input PIN. I didn’t have any strange behaviors from it. If it is so, should I still try to configure it as a GPIO pin in such a way like this post describt?

I’m not sure about that other post. Basically though the first step is to set up a pin for GPIO (instead of SFIO) via the PINMUX spreadsheet (if the pin is set as SFIO then it can’t be used as GPIO…there might be ways after boot to turn SFIO into GPIO, but it isn’t guaranteed because the source might be busy…following the instructions related to the PINMUX spreadsheet allows the default pin function type to be what you want after boot without special steps).

After the pin is GPIO the nature of the GPIO (such as if it is for input or output or interrupt…high or low or edge trigger, so on) is set up and the GPIO is used. The nature of the GPIO pin setup is often set after boot…versus whether it is SFIO or GPIO, which is set before or during boot for most uses.

Earlier posts have mentioned the PINMUX spreadsheet. Get this spreadsheet and instructions related to it, enable spreadsheet macros, and the rest is more or less a recipe. See:
https://developer.nvidia.com/embedded/downloads#?search=pinmux

Some related docs for people creating their own carrier board might describe parts of the PINMUX:
https://developer.nvidia.com/embedded/downloads#?search=bringup

Note that device tree can essentially set up initial driver state related to a specific GPIO pin (though if the pin is SFIO this won’t work).

What is the meaning of “SFIO”?

“GPIO” is general purpose I/O, and related pins on the module may have multiple uses depending on configuration. “SFIO” is special function I/O, and is not generally able to handle different functions even if configuration changes.

You’ll find that talking about the PINMUX spreadsheet is usually related to GPIO configuration (or related support of GPIO), and the device tree may be part of this (and in fact the PINMUX may generate a different device tree). The PINMUX spreadsheet is not directly installed on the Jetson, but does create content useful to the flash software. The device tree is actually installed on the Jetson (mostly as a binary partition).

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