Hi,
I am developing a project that applies GPUDirect RDMA technology.
My system is：
FPGA: XCKCU15P
GPU: NVIDIA A100
Server: Lenovo SR658
System:Centos
CUDA:11.2
FPGA and A100 are mounted on the same PCIe bridge.
When the FPGA sends a read request to the GPU through XDMA, The PCIe bridge(c9:02.0) will immediately reply with an error message, which is displayed as UR, CA,CSR.
The RDMA driver was developed based on “jetson-rdma-picoevb-master”, with the script selected as “build-for-pc-native. sh”.The requested space address is 0xCC000600000, which is just within the BAR1 space of the GPU.
And the bridge also covers this part of the space.
I think it is correct for the driver to obtain the GPU address 0xCC000600000 in GPU BAR space by calling nvidia_p2p_get_pages and nvidia_p2p_dma_map_pages.
Is it because of the chipsets?Do i need to replace the server?What can i do?
Looking forward to your reply!!!