Jetson Nano unexposed GPIOs

Robotics & Edge Computing Jetson Systems Jetson Nano
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1

I have a custom made carrier for a project that uses a CSI interface based on the Jetson Nano Dev Board. I need to be able to control GPIO00 and GPIO06 (Module Pins 87 and 130) as part of this interface. I have not found any clear direction on how these pins can be set Hi or Low.

Any help would be appreciated.

3

We support the standard way. Export the GPIO # you want to use by using sysfs.

https://www.kernel.org/doc/Documentation/gpio/sysfs.txt

4

Thanks

How do I know the equivalent sysfs GPIO number for a specific Nvidia GPIO? I have seen references to consult the PinMux spread sheet but after reviewing this document I do not see
any of the below listed?

GPIO00 (Module pin 87)
GPIO02 (Module pin 124)
GPIO03 (Module pin 126)
GPIO04 (Module Pin 127)
GPIO05 (Module Pin 128)
GPIO06 (Module Pin 130)

Is there a reference for these pins?

Cheers!

5

  1. Take NV_Jetson_Nano_Module_Pinmux_Config_Template.xlsm;

  2. Open this file in the Microsoft Word;

  3. Switch to “Jetson_Nano_Module” tab;

  4. Find module pin number in the column “B01 SODIMM”;

  5. In the “GPIO” column you see something like “GPIO3_PXX.YY”;

The “XX.YY” is your SysFs number.

For example: GPIO00 → Module pin 87 → GPIO3_PCC.04 → 28*8+4=228.

GPIO06 → Module pin 130 → GPIO3_PI.00 → 8*8+0=64.

Table for decode “XX”:

15:#define TEGRA_GPIO_PORT_A 0
16:#define TEGRA_GPIO_PORT_B 1
17:#define TEGRA_GPIO_PORT_C 2
18:#define TEGRA_GPIO_PORT_D 3
19:#define TEGRA_GPIO_PORT_E 4
20:#define TEGRA_GPIO_PORT_F 5
21:#define TEGRA_GPIO_PORT_G 6
22:#define TEGRA_GPIO_PORT_H 7
23:#define TEGRA_GPIO_PORT_I 8
24:#define TEGRA_GPIO_PORT_J 9
25:#define TEGRA_GPIO_PORT_K 10
26:#define TEGRA_GPIO_PORT_L 11
27:#define TEGRA_GPIO_PORT_M 12
28:#define TEGRA_GPIO_PORT_N 13
29:#define TEGRA_GPIO_PORT_O 14
30:#define TEGRA_GPIO_PORT_P 15
31:#define TEGRA_GPIO_PORT_Q 16
32:#define TEGRA_GPIO_PORT_R 17
33:#define TEGRA_GPIO_PORT_S 18
34:#define TEGRA_GPIO_PORT_T 19
35:#define TEGRA_GPIO_PORT_U 20
36:#define TEGRA_GPIO_PORT_V 21
37:#define TEGRA_GPIO_PORT_W 22
38:#define TEGRA_GPIO_PORT_X 23
39:#define TEGRA_GPIO_PORT_Y 24
40:#define TEGRA_GPIO_PORT_Z 25
41:#define TEGRA_GPIO_PORT_AA 26
42:#define TEGRA_GPIO_PORT_BB 27
43:#define TEGRA_GPIO_PORT_CC 28
44:#define TEGRA_GPIO_PORT_DD 29
45:#define TEGRA_GPIO_PORT_EE 30
46:#define TEGRA_GPIO_PORT_FF 31

P.S.: By the way - GPIO06 uses for CSI. And it is busy.

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