(Jetson Xavier AGX) Sensor Processing Engine required arm-none-eabi- version not working

I am trying to build the SPE to develop a freeRTOS project for the Cortex-R5 chip and per the guide for building and flashing the required version of arm-none-eabi is GNU Arm Embedded Toolchain 4.8-2014-q3-update (link: 4.8-2014-q3-update : Series 4.8 : GNU Arm Embedded Toolchain) when I set up the CROSS_COMPILE environmental variable and call make I end up with arm-none-eabi-gcc: command not found. When this process is run with another version of gcc the issue doesn’t happen but it causes other issues down the line. What am I doing wrong?

The reference I was following: Jetson Sensor Processing Engine (SPE) Developer Guide: Compiling and Flashing

Hello, Jeremy:
That must be something wrong with your settings.
Share the script I’m using for 32.5 SPE firmware building. You can try it. If there’s any problem, please paste the log for full command and result, and we can check.


building-pc:~/Work/jetson_sdk/32.5/spe-fw$ cat spe-firmware-build.sh
set -e
export TOP="${HOME}/Work/jetson_sdk/32.5/spe-fw/l4t-rt"
export CROSS_COMPILE="${HOME}/Tools/gcc-arm-none-eabi-4_8-2014q3/bin/arm-none-eabi-"
export FREERTOS_DIR=${TOP}/FreeRTOSV8.1.2/FreeRTOS/Source
export FREERTOS_COMMON_DIR=${TOP}/freertos-common
##### To build for Jetson AGX ##
cd ${TOP}/rt-aux-cpu-demo && make -j8 bin_t19x

Do note that every cross compiler runs on your PC, but outputs for a different architecture. The architecture used for applications on the AGX is normally arm64/aarch64, but the arm-eabi-none is for 32-bit armhf (due to the Cortex R5 being that architecture). So you need the 32-bit armhf compiler to cross compile this, and even if you have the arm64 cross compiler, this would be the wrong architecture for the R5.

I was able to successfully build , The issue i think was from how the toolchain was extracted. I used this command: tar -xpf gcc-arm-none-eabi-4_8-2014q3-20140805-linux.tar.bz2
from Failed to build SPE rt-aux-cpu-demo on TX2.

Now that it is build I am wondering what is the process for flashing. I dont want to remove anything that I have on the Jetson. Do I use the SDK Manager to flash if so how do I do it?

Thank you,

tar” sometimes has options which don’t use the traditional hyphen prior to options. You might try “tar xpf gcc-arm...”. As for flashing, an upgrade via JetPack/SDKM will erase the entire root partition. You could cheat and instead of using the default files used to create this some of the rootfs content. Just depends on what is being flashed, as there are options which will change what gets erased/renewed or not. Can you specify exactly what it is you want to do? Beware that some content from older releases is not compatible with newer content, but that is mostly from the boot chain and perhaps device tree.

I am trying to write a freeRTOS program to Which would interface with CAN, I2C GPIO. I want to just flash the always-on R5 chip to test and develop my freeRTOS program without erasing other things that are on the Jetson. Is that a possibility or should I just write the program to run on Linux and create drivers for I2C and CAN and so on?

Hello, bottomsjeremy:
For BSP/firmware developer, we suggest flash the device through command line.
Refer to Tegra Linux Driver for details.
For SPE FW, rt-aux-cpu-demo/doc/compile-flash.md may provide some useful information.