Hi everyone,
I’m working on an experimental fork of Salvatore Sanfilippo’s ds4 project, focused on running DeepSeek-V4-Flash efficiently on a single NVIDIA GB10/GX10 system.
Original project:
My experimental fork:
The goal of this fork is very specific: improve local inference throughput for DeepSeek-V4-Flash on a single GB10/GX10 machine, without changing the target model distribution.
What I implemented
The main areas of work are:
- DSpark sidecar loading and GGUF conversion support.
- True p/q speculative rejection sampling for DSpark drafts.
- CUDA-side verifier logic for p/q acceptance and residual correction.
- DSpark-specific CUDA Graph variants for drafter and verifier paths.
- GB10-oriented Tensor Core tiny-batch experiments.
- Q8 tiny-batch reuse and Q8/F16 hot-cache profiles.
- Reproducible run scripts and log analyzers.
Current results
On one NVIDIA GB10 machine, with DeepSeek-V4-Flash plus the DeepSeek-V4-Flash-DSpark sidecar, I measured roughly:
| Profile | Throughput |
|---|---|
| Initial CUDA path | ~13 t/s |
| CUDA Graph + fused compressor + Q8/F16 cache | ~14.5-14.7 t/s |
| MTP sidecar experiments | ~15.1 t/s |
| DSpark p/q rejection sampling | ~16.8-17.6 t/s |
| DSpark p/q rejection + GPU verifier + Tensor Core tiny batches | ~18.2 t/s weighted decode |
Representative final analyzer output:
Fused verifier cycles: 1029
Ordinary/fallback cycles: 0
P/Q rejection cycles: 1029
Verifier acceptance: 53.18%
Mean verifier target rows: 4.956
Mean verifier draft time: 20.572 ms
Mean verifier target time: 148.339 ms
Mean fused cycle: 168.911 ms
Verifier-cycle throughput: 18.376 t/s
Weighted request decode: 18.274 t/s
The important part is that the final path uses true speculative rejection sampling. Draft tokens are sampled from q, the target model defines p, accepted tokens follow min(1, p(x)/q(x)), and rejected drafts are replaced from the positive residual distribution. So the goal is not just “faster approximate decoding”, but preserving the target sampling distribution.
Where I’m looking for feedback
The main bottleneck is still the target verifier step. In the best profile, the fused DSpark cycle is around 169 ms, with about 148 ms spent in the target verification path.
I would be very interested in feedback from CUDA/GB10 developers on:
- Whether the tiny-batch Tensor Core strategy is the right direction for this workload.
- How to better structure verifier batches for GB10/Blackwell-class hardware.
- Whether CUDA Graph update/replay patterns can be improved for this kind of token-by-token speculative decode loop.
- Whether there are recommended profiling strategies for this type of workload on GB10, especially when Nsight Compute has trouble with graph/profiled kernels.
- Any obvious GB10-specific CUDA optimization opportunities I may be missing.
This is still experimental code, but the full fork, scripts, README and analyzer tools are available here:
Thanks in advance for any suggestions.



