Orin Nano GPIO problem

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
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Hi, I am working on Jetson Orin Nano custom carrier board, where STM32F091RC chip is integrated. I am using Jetpack 5.1.2 or l4t 35.4.1. But I am not using SDK manager , rather I am using Vision-Component build tool where it take care of integrating camera drivers. But similier process of SDK Manager.

There is debug for carrier board, where it can be use for jetson flashing as well as stm flashing by switching some DIP switch. But both Jetson and STM can not be flash parallelly as force recovery pin in debug board works for both in ON (Jetson flash ) and OFF (STM can flash, along with enabling STM Boot and Reset )condition. This process works, I can flash both via debug board.

But the STM can be programmable with the Jetson Orin Nano for firmware updates of the STM. The Jetson is connected with the STM through a serial connection (UART1 - ttyTHS0 with the current image).

Pin name STM (Pin) Net name baseboard Pin name Nvidia Jetson (Pin)
PA14 (37) STM_BOOT_USART_TX UART1_RXD (205)
PA15 (38) STM_BOOT_USART_RX UART1_TXD (203)
PF11 (44) STM_BOOT_MODE GPIO05 (128)
NRST (7) STM_RESET GPIO04 (127)
127 GPIO04 GPIO04 SPI2_MISO GP07_SPI2_MISO unused_SPI2_MISO GPIO3_PCC.01 SPI2_DIN B B SPI2 RSVD1 RSVD2 RSVD3 RSVD1 spi2_miso_pcc1 vddio_ao GTE_SLICE2[21] SPI2_MISO AO DD BDPGLPHVIN_HFCR90_VDP1P1P1 50k pd GPIO3_PCC.01 Output Drive 1 Initiator Disable Disable STM_RESET_1V8* Baseboard Power LED Control
128 GPIO05 GPIO05 SPI2_MOSI GP08_SPI2_MOSI unused_SPI2_MOSI GPIO3_PCC.02 SPI2_DOUT B B SPI2 RSVD1 RSVD2 RSVD3 RSVD1 spi2_mosi_pcc2 vddio_ao GTE_SLICE2[20] SPI2_MOSI AO DD BDPGLPHVIN_HFCR90_VDP1P1P1 50k pd GPIO3_PCC.02 Output Drive 0 Initiator Disable Disable STM_BOOT_1V8 Baseboard Wifi Disable Control

Accoring to this, I have configured in xlms file and generated accordingly.

And following the documentation I have applied them in p3509-a02+p3767-0000.conf file by placing the padvoltage.dtsi and pinmux.dtsi files to the <l4t_top>/bootloader/t186ref/BCT/ and he gpio.dtsi file to the <l4t_top>/bootloader/ directory.

But when tries to flash stm using stm32flasher, the GPIO005 and GPIO004 are not working properly. But if use debug board then these pins configured accordingly and stm32flasher works. But I am trying to set these GPIO from Jetson.

I have made a custom file which combine everything for stm32flasher and I have attached the output file.
stm32flasher_ouput.txt (1.5 KB)
The Reset works as active low, then the Boot mode can be enter as active High. But it seems non of the GPIO has any effect.

I am doing it right ? Looking for some solution.

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Hi wolfcoder90,

It seems the custom design on your board.
Is the custom board designed by you or you buy it from other vendor?

It seems your current issue is specific to UART interface.(uarta)
Have you verified UART loopback test before connecting with your STM MCU?

Have you also verified GPIO05 and GPIO04 can be controlled correctly?
Please also check them from scope.

4

This board is designed by us. Did not test loop back test but after STm flashed using deburg board, I can communicate from Jetson to STM using same UART.

How can I verified GPIO004 and GOIO005 can be controlled correctly ? I loocked into the scope , it does not change whe, I try to set value to GPIO. In pinmux, I have set GPIO04 : 1 and GOIO05 : 0 , but after flash, it does return me any value.

5

I would suggest you verifying UART loopback test before connecting with serial device like MCU.

(short UART TX/RX)
$ sudo su
# stty -F /dev/ttyTHS0 115200 raw -echo
# cat /dev/ttyTHS0 &
# echo "test" > /dev/ttyTHS0

You can run the following commands to control GPIO through gpiod.

# gpioset --mode=wait `gpiofind "PCC.01"`=1
# gpioset --mode=wait `gpiofind "PCC.01"`=0
# gpioset --mode=wait `gpiofind "PCC.02"`=1
# gpioset --mode=wait `gpiofind "PCC.02"`=0

From the log you shared as following, why it controls PY.05 and PY.06 rather than PCC.01 and PCC.02 you mentioned in original post?

⚙️  Configuring BOOT0 (GPIO 128) to output 0...
🔍 BOOT0 (GPIO 128) value: 0
⚙️  Configuring RESET (GPIO 127) to output 1...
🔍 RESET (GPIO 127) value: 0
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Loop back test is tough now as MCU is already integrated.

There were few permission error ,so I have added udev rules but now the GPIO is used by kernel , stmflaser could not access it.

Previoulsy, I used wrong name, after doing some debugging with gpiod tools, the correct name are

line 13: “PCC.01” unused output active-high value: 1
line 14: “PCC.02” unused input active-high value: 0

I have already verified by pressing button from debug board.

But after changing the name, it seems PIN 14 value is changing , not 13’s. I have added both code and output as a txt file.
stm32flasher_ouput.txt (1.5 KB)
stmflaher_tools.txt (1.9 KB)

7

In exceel file, I tried to set them both output / Bidirectional. But in each case, they appear as input. Do no understand why ?

below is snippet from gpio dtsi

gpio@c2f0000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_aon_default>;

		gpio_aon_default: default {
			gpio-input = <
				TEGRA234_AON_GPIO(EE, 2)
				TEGRA234_AON_GPIO(EE, 4)
				>;
			gpio-output-low = <
				TEGRA234_AON_GPIO(CC, 2)
				TEGRA234_AON_GPIO(CC, 3)
				TEGRA234_AON_GPIO(AA, 4)
				>;
			gpio-output-high = <
				TEGRA234_AON_GPIO(CC, 1)
				TEGRA234_AON_GPIO(AA, 5)
				TEGRA234_AON_GPIO(BB, 3)
				>;
		};
	};

Below is from live device tree:

gpio@c2f0000 {
		compatible = "nvidia,tegra234-gpio-aon";
		reg-names = "security\0gpio";
		reg = <0x00 0xc2f0000 0x00 0x1000 0x00 0xc2f1000 0x00 0x1000>;
		interrupts = <0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3b 0x04>;
		gpio-controller;
		#gpio-cells = <0x02>;
		interrupt-controller;
		#interrupt-cells = <0x02>;
		gpio-ranges = <0x2b1 0x00 0x8a 0x08 0x2b1 0x08 0xac 0x18>;
		status = "okay";
		phandle = <0x66>;
	};
8

How do you determine they are Input?
Have you run gpioget for PCC.02 so that it shows Input?

9

Yes, I have run gpioget, and it showed as input.

After changing Pinmux in Excel, I found that this is a Pinmux DTSI file. Is that correct?

spi2_miso_pcc1 {
nvidia,pins = “spi2_miso_pcc1”;
nvidia,function = “rsvd1”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};

		spi2_mosi_pcc2 {
			nvidia,pins = "spi2_mosi_pcc2";
			nvidia,function = "rsvd1";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
			nvidia,lpdr = <TEGRA_PIN_DISABLE>;
		};

Does nvidia,function = “rsvd1”; is okay or it should be nvidia,function = “gpio”;

10

gpioget will switch the pin state. (i.e. if you run this command for an Output pin, it will also become an Input pin)

Yes, they are configured in pinmux/gpio dtsi generated from pinmux spreasheet and they will be loaded/configured in early boot(MB1).

rsvd1 should be fine for GPIO use case.

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