Padding problem (NVCC bug?)

Accelerated Computing CUDA CUDA Programming and Performance
1

Hello! Compiling cudpp under Windows (32-bit, visual studio 8) I ran into a very nasty bug. The CUDPPPlan class has different layouts in the *.cu files and in the *.cpp files. In the CPP files, CL generates a normal memory layout
(vptr (4-bytes), CCUDPPConfiguration(4 * 4 bytes), numElements, m_numRows, rowPitch all 4-bytes. The struct is perfectly aligned (all 4 bytes stuff for a total of 32 bytes.

The problem is, NVCC generates this “thing”

struct CUDPPPlan { const int *__vptr;pad(volatile char:8;)
pad(volatile char:8;)
pad(volatile char:8;)
pad(volatile char:8;)
#line 29 “./src\cudpp_plan.h”
struct CUDPPConfiguration m_config;
size_t m_numElements;
size_t m_numRows;
size_t m_rowPitch;volatile char __dummy[4];};
#line 34 “./src\cudpp_plan.h”

note padding beginning and end?
Since the struct is created in CPP and passed to CU files, everything crashes.
BTW, on 64 bits works (first pointer 8 bytes, NVCC avoids padding.

Is there a workaround for this?

Lorenzo

2

Ok, I found a workaround. I moved around order of class members

class CUDPPPlan
{
public:
CUDPPPlan(CUDPPConfiguration config, size_t numElements, size_t numRows, size_t rowPitch);
virtual ~CUDPPPlan() {}
size_t m_numElements; //!< @internal Maximum number of input elements

// Note anything passed to functions compiled by NVCC must be public
CUDPPConfiguration m_config;        //!< @internal Options structure
size_t             m_numRows;       //!< @internal Maximum number of input rows
size_t             m_rowPitch;      //!< @internal Pitch of input rows in elements

};

Now I haven’t the NVCC padding anymore. Bul clearly this is a bug. Where can I submit it?