pinned (non-pageable) memory cannot be paged out by the OS. When you allocate too much pinned memory, your computer may become unstable. That is why it is up to the programmer to choose which memory he allocates as pinned memory.
On Core i7, the host memory bandwidth is much higher, there the difference between pinned and pageable is much lower.
There is an additional issue related to pageable vs non-pageable memory, that I would happy to have some insight from NVIDIA people. According to Cuda 2.0 documentation Async memory transfers between host and device are supported only for non-pageable (pinned) memory allocated with cudaMallocHost. There is any chance that new Cuda releases would support such Async memory transfers also for standard pageable memory?