SIMT = SIMD hardware with MIMD programming model
In general, data parallelism is much more important than task ||ism because only data sizes can scale up. Therefore, you want to minimize the amount of instruction processing hardware by using a SIMD architecture, but old fashioned SIMD is clumsy to program for, so I guess NVIDIA is very wise to create SIMT, which retains the efficiency of SIMD, but with much more flexibility (none of that SSE grief - massaging data into and out of vector registers) by presenting the illusion that all threads are independent.
From my observations, in most performance critical code, there are not many divergent execution paths, so SIMT should be completely adequate and full MIMD is not needed.
Currently, CUDA only allows every adjacent 32 threads to benefit from SIMT, which can cause low throughput if there’s a lot control flow divergence. But they can always relax that restriction and allow more threads that are at the same program location to benefit from SIMT.