TK1 RAM code setting - - - Used H5TC4G63CFR-PBA

Hi,
TK1 RAM code setting problem - - - If we used H5TC4G63CFR-PBA.
What’s RAM code value we need to set?

Owen

No need to change RAM code. RAM_CODE[1:0] is for multi-SDRAM on same board, and RAM_CODE[3:2] is for secondary boot device, as you can see in the schematic, page 24.

Thanks, but I still need your confirmation. Because of schematic makes me confuse.
page 24 circuit shows “0011” Bit[1,0] 11 ; bit[3,2]00.
But comments shows difference.(Refer to as below list) So which one I could follow with?

               R8B3     R3B1      R9B2     R2B1

H5TC4G63AFR-RDA Stuffed Empty Stuffed Empty
H5TC4G63CFR-RDA* Empty Stuffed Stuffed Empty
*current BOM
—Update 201605

Since chose DDR is not same as comments list, you need to generate config files based on H5TC4G63CFR-PBA parameter and replace the corresponding lines in BCT (Current RAM_CODE[1:0] on board is ‘10’, so these lines are headed with ‘SDRAM[2]’ in BCT file). About how to generate config file, please refer to the App_Note in package of Jetson TK1 Memory Characterization Tool:
https://developer.nvidia.com/embedded/dlc/tegra-k1-memory-characterization