Hi ,Yes exactly,i just rechecked by hot plugging the cable to if there is any actiivty i see nothing.
Thank you
Do you have Xaiver NX devkit on your side that can use? That is the p3509 board mentioned in board config
One trick to test. Please export 424 to /sys/class/gpio/export and you shall see PM.00 in your /sys/kernel/debug/gpio after doing that.
Please do hotplug and see if the status change.
BTW, your topic is jetpack5.1.2 but your log is still jp5.1.1.
Unfortunately i dont have the Xavier NX devkit .We have jetson nano ,orin nano .
We just controlled the hardware on our carrier and did a rework to ensure there is hpd signal.AFter the rework
I see the following message on the uart console whenever i plug in the hdmi cable
Hi ,Yes now i can see the gpio pins status change whe hotplug is connected ,after the rework.
We want debug if everything okay on the DDC channel ,is there a way to this DDC registers?
Is xorg log or xrandr result giving you connected after your rework?
One further question. Why do you need to startx by yourself? Our rootfs has gdm3 enabled by default so Xorg will be running since boot.
Sorry i didnt know that ,i thought the startx need to be executed manually.
It is actually weird. If gdm3 is enabled by default, your startx will give error.
Are you sure this is pure sdkmanager image?
Actually ,When i execute startx now (also after the booting withthe new P3509.conf),i see that it gets stuck and i had to do ctrl+c to get out.
Ok. That is expected.
Actually I think there is nothing to check from my side. Unfortunately, I think hardware design is related.
Orin HDMI is not like Xavier or TX2 which has some flexibility. You must design your board same as Xaiver NX devkit (display part).
Hi ,Thanks a lot for the help.
We are looking in to the design guide this
and noticed that
- we dont have the 499ohm resistor ( we have 50 ohm)
- Rs resistors
Could you please let us know why they are necessary ?
Thank you
You should be able to find the answer in Design Guide doc.
Hi Team,
Could you please let us know where can we find more details on the DDC lines (I2C logic levels i.e VIL, VIH of SDA, SCL) accepted by the Jetson orin nano SoM ,can you please provide the specification document?
Please refer to the table as below in module data sheet. Jetson Orin Nano Series Module Data Sheet
Hi,
We are wondering which is the VIL of pin 98 and 100 (SDA and SCL used for HDMI). I think that is I2C6 (table you linked is for I2C0,1,2).
If that table applies anyways, what’s the VDD for pin 98 and 100? is VDD set by the external pull up resistor or internally by the bank voltage?
Appreciate any explanation.
It is 1.8v pin and same characteristics as that I2Cs in above table.
is it possible to change it 3.3V somehow? in that case, how?