Adding PPS input to TX1 for Line Discipline

I’d like to add GPS to TX1 for more accurate timing. I was able to re-build L4T 24.2 kernel with


and verified pps client is working using pps-tools.
I’d like to use TX1 GPIO pin 13 of J21 (pe6 in dtb?) as 1PPS input.
What need to be done to have pps client triggered by GPIO instead of ktimer?

Thanks in advance for advices.

Hi yahoo2016,

Pin 13 is OK to be used as PPS input. But about “verified pps client is working using pps-tools”, I am curious how you verify it? What is this “pps client” ?

In kernel configuration, it says “PPS clients support”

<M> PPS support
[ ]   Use low level IRQ timestamps
[ ]   PPS debugging messages
      *** PPS clients support ***
<M>   Kernel timer client (Testing client, use for debug)
<M>   PPS line discipline
[ ]   Parallel printer support

With new kernel and pps-tools, I got output like:

$ sudo ppstest /dev/pps0
trying PPS source "/dev/pps0"
found PPS source "/dev/pps0"
ok, found 1 source(s), now start fetching data...
source 0 - assert 1186592699.388832443, sequence: 364 - clear  0.000000000, sequence: 0
source 0 - assert 1186592700.388931295, sequence: 365 - clear  0.000000000, sequence: 0
source 0 - assert 1186592701.389032765, sequence: 366 - clear  0.000000000, sequence: 0

I believe “/dev/pps0” is triggered by kernel timer (ktimer), properly configured external 1PPS input should appear as “/dev/pps1”.

In this link, it seems dtb need to be modified to have GPIO work as PPS input:


pps {
compatible = "pps-gpio";
gpios = <&gpio1 1 0>;

I’m not sure how to modify TX1 dts file to use pin 13 of J21 for PPS input.

I could also use CTS pin of UART, when I tried:

“ldattach PPS /dev/ttyTHS2” I got “/dev/pps1” created but “sudo ppstest /dev/pps1” produced timeout.

I tried to use tty_ioctl to test RST/CST pins of UART (/dev/ttytTHS2) but they do not seem to work.

“/dev/ttytTHS2” did work for GPS serial data, but not 1PPS.

Any ideas on how to use GPIO or UART CTS pin as PPS input for line discipline?
PPS line discipline is very important for UAV or NTP applications and has been implemented for Raspberry Pi and other arm processors.

PPS line discipline is already built in Linux kernel, the missing link is from TX1 GPIO or CTS to the kernel.

Any ideas from Nvidia? We are going to have IPR in a month, it’d be showstopper without 1PPS line discipline for cameras sync and navigation.

Hi yahoo2016,
Sorry for not able to respond earlier as this is not a straightforward answer. Bottom line is the hardware support for PPS signal is only available in the chip after Jetson TX1. To achieve similar result, one can use the approach to input the same signal, say GPS PPS, to both devices to synchronize the clock. This is interrupt based and there is latency issue to resolve. For that, we suggest using TSC (TRM section 8.2) due to its nature of oscillator granularity. There is a ktime_get_ts() kernel call, however it depends on your latency needs.