ADV7480 Driver on Jetson Orin Nx

Hello, on the orin nx carrier card we have designed, there is an ADV7480 integration connected to CSI2 and CSI3 lines. Also ADV7480 is connected to Orin Nx module I2C0 line. I have developed a dtsi file for this integration to work and this file is attached. When I run the “media-ctl -p” command on the Orin nx module, it seems that the connections related to the ADV7480 are made, but there is no connection under /dev/video*. Where do you think I should pay attention for this?

jetson@jetson:~$ media-ctl -p
Media controller API version 5.10.104

Media device information
------------------------
driver          tegra-camrtc-ca
model           NVIDIA Tegra Video Input Device
serial          
bus info        
hw revision     0x3
driver version  5.10.104

Device topology
- entity 1: 13e40000.host1x:nvcsi@15a00000- (2 pads, 0 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
	pad1: Source

- entity 4: adv748x 1-0070 txa (2 pads, 1 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
		<- "adv748x 1-0070 hdmi":1 [ENABLED]
	pad1: Source

- entity 7: adv748x 1-0070 hdmi (2 pads, 1 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
	pad1: Source
		-> "adv748x 1-0070 txa":0 [ENABLED]

I also typed “sudo dmesg | grep tegra-camtrc*” at the command line and the log is as follows;

jetson@jetson:~$ sudo dmesg | grep tegra-camrtc
[sudo] password for jetson: 
[    6.863862] tegra-camrtc-capture-vi tegra-capture-vi: subdev 13e40000.host1x:nvcsi@15a00000- bound
[   14.311367] tegra-camrtc-capture-vi tegra-capture-vi: Driver tegra-camrtc-capture-vi uses device fwnode, incorrect match may occur
[   14.346674] tegra-camrtc-capture-vi tegra-capture-vi: Consider updating driver tegra-camrtc-capture-vi to match on endpoints
[   14.359051] tegra-camrtc-capture-vi tegra-capture-vi: subdev adv748x 1-0070 txa bound

I would be very grateful if you can help me.

Best regards,

Can
adv7480_dtsi_files.zip (3.4 KB)

hello sdemirel,

media-ctl -p it should shows the port binding for Sensor → CSI → VI. your result it seems you did not have VI part present.
please refer to developer guide, you may see-also Port Binding section for implementation.

BTW,
you may see-also reference driver, Lontium LT6911UXC HDMI-CSI bridge driver device tree for port binding definitions since ADV7480 also a HDMI to MIPI CSI converter IC.
for instance,
$public_sources/r36.3/Linux_for_Tegra/source/kernel_src/hardware/nvidia/t23x/nv-public/nv-platform/tegra234-camera-p3785.dtsi

Hi, I am sure of the port assignments, I even tried different ways by changing the port-index, but the result is the same, it does not appear in /dev/video*.

I also updated my dtsi file similar to tegra234-camera-p3785.dtsi, but again the result is the same. Which other way can I try?

hello sdemirel,

is there failure while device registration?
please share the complete kernel init messages for checking. i.e. $ dmesg > klogs.txt

Hello,

Everything seems to be correct, the address of the device has been read via i2c and the address of the device appears in the log. The log you requested is also attached.

klogs.txt (75.2 KB)

hello sdemirel,

it looks like some warning has reported.

[   13.875963] tegra-camrtc-capture-vi tegra-capture-vi: Driver tegra-camrtc-capture-vi uses device fwnode, incorrect match may occur
[   13.875968] tegra-camrtc-capture-vi tegra-capture-vi: Consider updating driver tegra-camrtc-capture-vi to match on endpoints
[   13.875979] tegra-camrtc-capture-vi tegra-capture-vi: subdev adv748x 1-0070 txa bound

besides,
did you use Device-tree overlay to register this camera device?
please check developer guide to assign proper overlay information and a compatible string.

Hello,

I checked the adv748x source code and it is doing the probe operation correctly. I also checked the port bindings again and it is also correct. I am sharing the dtsi and dts files one by one below.

//This document:  tegra234-adv7480-driver.dtsi

#include <dt-bindings/media/camera.h>
#include <dt-bindings/platform/t210/t210.h>
#include <dt-bindings/gpio/tegra234-gpio.h>
#include <dt-common/jetson/tegra234-p3767-0000-common.h>



#define PORT_INDEX	2
#define BUS_WIDTH	4

/ {

	

	tegra-capture-vi  {
		nvidia,vi-mapping =
			<0 0>,
			<1 0>,
			<2 0>,
			<3 0>,
			<4 1>,
			<5 1>;
		num-channels = <1>;
			ports {

				#address-cells = <1>;
				#size-cells = <0>;
				vi_port0: port@0 {
					reg = <0>;
					adv7480_vi_in0: endpoint {
						port-index = <PORT_INDEX>;
						bus-width = <BUS_WIDTH>;
						remote-endpoint = <&adv7480_csi_out0>;
					};
				};
				
			
				
			};
		
			
	};


	host1x@13e00000 {

		nvcsi@15a00000 {

			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			
			csi_chan0: channel@0 {
				
				reg = <0>;

				ports {
					
					#address-cells = <1>;
					#size-cells = <0>;
					csi_chan0_port0: port@0 {
						reg = <0>;

						adv7480_csi_in0: endpoint@0 {

							port-index = <PORT_INDEX>;
							bus-width = <BUS_WIDTH>;
							remote-endpoint = <&adv7480_out0>;
						};
					};
					csi_chan0_port1: port@1 {
						
						reg = <1>;

						adv7480_csi_out0: endpoint@1 {

							remote-endpoint = <&adv7480_vi_in0>;
						};
					};
				};
			};
			
			
		};
		
	};

	hdmi-in {
		compatible = "hdmi-connector";
		label = "HDMI IN";
		type = "a";

		port {
			hdmi_in_con: endpoint {
				remote-endpoint = <&adv7480_hdmi>;
			};
		};
	};

	
	i2c@c240000 {	// HDMI or SDI	
		
			adv7480:adv748x@70 {
				
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "adi,adv7481";
				
				/* I2C device address */
				
				reg = <0x70 0x73 0x74 0x75
		   			   0x60 0x62 0x63 0x64 0x65>;
			
				reg-names = "main", "hdmi", "edid", "repeater",
					    "infoframe", "cec", "sdp", "txa", "txb";
				
				
				devnode = "video0";

				interrupt-parent = <&tegra_main_gpio>;
				interrupt-names = "intrq1", "intrq2";
	        		interrupts = <TEGRA234_MAIN_GPIO(I, 0) GPIO_ACTIVE_HIGH>,
						<TEGRA234_MAIN_GPIO(I, 1) GPIO_ACTIVE_HIGH>;


				/* Physical dimensions of sensor */
				physical_w = "4.713";
				physical_h = "3.494";

				sensor_model = "adv7480";
				
				
				mode0 { // E2832_1920x1080_60Fps
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1920";
					active_h = "1080";
					mode_type = "rgb";
					pixel_phase = "rgb888";
					csi_pixel_bit_depth = "24";
					readout_orientation = "0";
					line_length = "1920";
					inherent_gain = "1";
					mclk_multiplier = "24";
					pix_clk_hz = "250000000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "2000000"; /* 2.0 fps */
					max_framerate = "60000000"; /* 60.0 fps */
					step_framerate = "1";
					default_framerate = "60000000"; /* 60.0 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "683709"; /* us */
					step_exp_time = "1";
					default_exp_time = "16667"; /* us  */
				};
				mode1 { // E2832_3840x2160
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "3840";
					active_h = "2160";
					mode_type = "rgb";
					pixel_phase = "rgb888";
					csi_pixel_bit_depth = "24";
					readout_orientation = "0";
					line_length = "3840";
					inherent_gain = "1";
					mclk_multiplier = "24";
					pix_clk_hz = "500000000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "2000000"; /* 2.0 fps */
					max_framerate = "60000000"; /* 60.0 fps */
					step_framerate = "1";
					default_framerate = "60000000"; /* 60.0 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "683709"; /* us */
					step_exp_time = "1";
					default_exp_time = "16667"; /* us  */
				};

				mode2 { // E2832_1280x720_60Fps
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_a";
					phy_mode = "DPHY";
					discontinuous_clk = "yes";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";
					active_h = "720";
					mode_type = "rgb";
					pixel_phase = "rgb888";
					csi_pixel_bit_depth = "24";
					readout_orientation = "0";
					line_length = "1280";
					inherent_gain = "1";
					mclk_multiplier = "24";
					pix_clk_hz = "250000000";

					gain_factor = "16";
					framerate_factor = "1000000";
					exposure_factor = "1000000";
					min_gain_val = "16"; /* 1.00x */
					max_gain_val = "170"; /* 10.66x */
					step_gain_val = "1";
					default_gain = "16"; /* 1.00x */
					min_hdr_ratio = "1";
					max_hdr_ratio = "1";
					min_framerate = "2000000"; /* 2.0 fps */
					max_framerate = "60000000"; /* 60.0 fps */
					step_framerate = "1";
					default_framerate = "60000000"; /* 60.0 fps */
					min_exp_time = "13"; /* us */
					max_exp_time = "683709"; /* us */
					step_exp_time = "1";
					default_exp_time = "16667"; /* us  */
				};

				ports {
					#address-cells = <1>;
					#size-cells = <0>;
				
		
					
					port@8 {
						reg = <8>;

						adv7480_hdmi: endpoint {
							remote-endpoint = <&hdmi_in_con>;
						};	
					};
					port@a {
						reg = <10>;
						adv7480_out0: endpoint {
							port-index = <PORT_INDEX>;
							bus-width = <BUS_WIDTH>;
							clock-lanes = <0>;
							data-lanes = <1 2 3 4>;
							remote-endpoint = <&adv7480_csi_in0>;
						};
					};
				};
			};
			
	}; 
	
};
/ {
	tcp: tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		
		num_csi_lanes = <4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <750000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;


		modules {
			
			cam_module0: module0 {

				badge = "hdmi_input";
				position = "top";
				orientation = "1";
				cam_module0_drivernode0: drivernode0 {

					pcl_id = "v4l2_sensor";
					devname = "adv7480 1-0070";
					proc-device-tree = "/proc/device-tree/i2c@c240000/adv748x@70";
				};
				
			};
			
		};
	};
};

//This document: tegra234-p3767-camera-adv7480.dtsi


/*
 * Copyright (c) 2022, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include "tegra234-adv7480-driver.dtsi"

#define ADV_RST		TEGRA234_AON_GPIO(CC, 3)
#define CAM0_PWDN	TEGRA234_MAIN_GPIO(H, 6)


/ {
	i2c@c240000 {
		
		adv748x@70 {
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
				<&bpmp_clks TEGRA234_CLK_EXTPERIPH1>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			reset-gpios = <&tegra_aon_gpio ADV_RST GPIO_ACTIVE_HIGH>;
			vana-supply = <&p3509_vdd_3v3_sys>;
			vdig-supply = <&p3509_vdd_3v3_sys>;
		};
	};

	gpio@c2f0000 {
		camera-control-output-high {
			gpio-hog;
			output-high;
			gpios = <CAM0_PWDN 0>;
			label = "cam0-pwdn";
		};
	};
};

//This document: tegra234-p3767-camera-adv7480-driver.dts
// SPDX-License-Identifier: GPL-2.0-only
/*
 * Jetson Device-tree overlay for ADV7480
 * 
 *
 * Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
 *
 */

/dts-v1/;
/plugin/;


/ {

	overlay-name = "HDMI Camera Driver ADV7480";
	jetson-header-name = "Jetson Nano CSI Connector";
	compatible = "JETSON_COMPATIBLE_P3509","nvidia,p3509-0000+p3767-0000", "nvidia,p3509-0000+p3767-0001", "nvidia,p3509-0000+p3767-0002", "nvidia,p3509-0000+p3767-0003";

	/* VI number of channels */
	fragment@0 {
		target-path = "/tegra-capture-vi";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			nvidia,vi-mapping =
				<0 0>,
				<1 0>,
				<2 0>,
				<3 0>,
				<4 1>,
				<5 1>;
			num-channels=<1>;
		};
        };
	fragment@1 {
		target-path = "/tegra-capture-vi/ports/port@0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
		};
	};
	fragment@2 {
		target-path = "/tegra-capture-vi/ports/port@0/endpoint";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
			port-index = <2>;
			bus-width = <4>;
			remote-endpoint = <&adv7480_csi_out0>;
		};
	};
	fragment@3 {
		target-path = "/host1x@13e00000/nvcsi@15a00000";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			num-channels = <1>;
		};
	};

	fragment@4 {
		target-path = "/host1x@13e00000/nvcsi@15a00000/channel@0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
		};
	};

	fragment@5 {
		target-path = "/host1x@13e00000/nvcsi@15a00000/channel@0/ports/port@0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
		};
	};

	fragment@6 {
		target-path = "/host1x@13e00000/nvcsi@15a00000/channel@0/ports/port@0/endpoint@0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
			port-index = <2>;
			bus-width = <4>;
			remote-endpoint = <&adv7480_out0>;
		};
	};
	fragment@7 {
		target-path = "/host1x@13e00000/nvcsi@15a00000/channel@0/ports/port@1";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
		};
	};

	fragment@8 {
		target-path = "/host1x@13e00000/nvcsi@15a00000/channel@0/ports/port@1/endpoint@1";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
			remote-endpoint = <&adv7480_vi_in0>;
		};
	};

	fragment@9 {
		target-path = "/i2c@c240000/adv748x@70";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
		};
	};
	fragment@10 {
		target-path = "/tegra-camera-platform";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			num_csi_lanes = <4>;
			max_lane_speed = <1500000>;
			min_bits_per_pixel = <10>;
			vi_peak_byte_per_pixel = <2>;
			vi_bw_margin_pct = <25>;
			max_pixel_rate = <750000>;
			isp_peak_byte_per_pixel = <5>;
			isp_bw_margin_pct = <25>;
		};
	};
	fragment@11 {
		target-path = "/tegra-camera-platform/modules/module0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
			badge = "hdmi_input";
			position = "top";
			orientation = "1";
		};
	};
	fragment@12 {
		target-path = "/tegra-camera-platform/modules/module0/drivernode0";
		board_config {
			sw-modules = "kernel";
		};
		__overlay__ {
			status = "okay";
			pcl_id = "v4l2_sensor";
			devname = "adv7480 1-0070";
			proc-device-tree = "/proc/device-tree/i2c@c240000/adv748x@70";
		};
	};

};

I call the file named tegra234-p3767-camera-adv7480.dtsi in the file named tegra234-p3509-a02.dtsi. Then when I build the kernel, I use the file named tegra234-p3767-0000-p3509-a02.dtb and throw it into the jetpack. In the Linux for tegra folder in the jetpack, I edit the following section in the p3767.conf.common file;

OVERLAY_DTB_FILE=“L4TConfiguration.dtbo,tegra234-p3767-overlay.dtbo,tegra234-p3767-camera-adv7480-driver.dtbo”;

Then I do the flashing process. Is there anything wrong so far?

may I double check your results of… To verify the port binding result.

Hi,

Actually it gave the same result as in my first message. I think there is a small part that is overlooked but I can’t find it.

Media controller API version 5.10.104

Media device information
------------------------
driver          tegra-camrtc-ca
model           NVIDIA Tegra Video Input Device
serial          
bus info        
hw revision     0x3
driver version  5.10.104

Device topology
- entity 1: 13e40000.host1x:nvcsi@15a00000- (2 pads, 0 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
	pad1: Source

- entity 4: adv748x 1-0070 txa (2 pads, 1 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
		<- "adv748x 1-0070 hdmi":1 [ENABLED]
	pad1: Source

- entity 7: adv748x 1-0070 hdmi (2 pads, 1 link)
            type V4L2 subdev subtype Unknown flags 0
	pad0: Sink
	pad1: Source
		-> "adv748x 1-0070 txa":0 [ENABLED]

hello sdemirel,

since you’re using CSI-C.

please revise sensor’s tegra_sinterface property for using serial_c accordingly.
for example,

since you’re working with Orin NX.
please also refer to Topic 252259 to update tegra234-p3768-0000-a0.dtsi to avoid using csi_chan0 symbol.

Hi,

I tried checking and reorganizing the part you mentioned but still the same problem continues.

please see-also Topic 290610 to examine camera device registration process.