AGX Orin with sgtl5000 has no sound

Hi,
The codec sgtl5000 has completed the platform configuration, but I have trouble with the codec part, please help me.

Enter the following command, and no signal can be detected on the analog signal output pins LINE OUT R/LINE_OUT_L and HP_L/HP_R of the codec sgtl5000:

amixer -c APE cset name="I2S1 Mux" ADMAIF1
amixer -c APE cset name="H40-SGTL Headphone Playback Volume" 30
amixer -c APE cset name="H40-SGTL Headphone Playback Switch" "on"
amixer -c APE cset name="H40-SGTL Lineout Playback Volume" 30
amixer -c APE cset name="H40-SGTL Lineout Playback Switch" "on"
speaker-test -D hw:1,0 -c 2 -r 48000 -F S16_LE -t sine -f 500

1, I2S1_SCLK, I2S1_DOUT, I2S1_FS pins can output digital signals, Below is my dts patch file.
diff_tegra234-p3737-audio.dtsi (8.7 KB)

diff --git a/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-audio.dtsi b/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-audio.dtsi
index 3acc085..8ec1b0a 100644
--- a/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-audio.dtsi
+++ b/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-audio.dtsi
@@ -30,9 +30,13 @@
 			i2s@2901300 {
 				bclk-ratio = <4>;
 			};
+			i2s@2901000 {
+				status = "okay";
+			};
 		};
 	};
 
+
 	tegra_acsl_audio: acsl_audio {
 		status = "okay";
 	};
@@ -42,157 +46,53 @@
 		status = "okay";
 	};
 
+	clocks {
+		sgtl5000_mclk: sgtl5000_mclk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <12288000>;
+			clock-output-names = "sgtl5000-mclk";
+			status = "okay";
+		};
+	};
+
+
+	hdr40_i2c1: i2c@c250000 { };
+
 	tegra_sound: sound {
 		status = "okay";
 		compatible = "nvidia,tegra186-ape";
 		nvidia-audio-card,name = "NVIDIA Jetson AGX Orin APE";
+
 		clocks = <&bpmp_clks TEGRA234_CLK_PLLA>,
 			 <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>,
 			 <&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
 		clock-names = "pll_a", "pll_a_out0", "extern1";
 		assigned-clocks = <&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
 		assigned-clock-parents = <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>;
-	};
 
-	tegra_sound_graph: sound_graph {
-		compatible = "nvidia,tegra186-audio-graph-card";
+		nvidia-audio-card,widgets =
+			"Headphone",	"H40-SGTL Headphone",
+			"Microphone",	"H40-SGTL Mic",
+			"Line",		"H40-SGTL Line In",
+			"Line",		"H40-SGTL Line Out";
 
-		/*
-		 * Tegra audio graph card is based on uptream generic audio
-		 * graph sound card. In future there is plan to use this
-		 * as default sound card.
-		 */
-		status = "disabled";
+		nvidia-audio-card,routing =
+			"H40-SGTL Headphone",	"H40-SGTL HP_OUT",
+			"H40-SGTL MIC_IN",	"H40-SGTL Mic",
+			"H40-SGTL ADC",		"H40-SGTL Mic Bias",
+			"H40-SGTL LINE_IN",	"H40-SGTL Line In",
+			"H40-SGTL Line Out",	"H40-SGTL LINE_OUT";
 
-		dais = /* ADMAIF (FE) Ports */
-		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
-		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
-		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
-		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
-		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
-		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
-		       <&admaif19_port>, <&admaif20_port>,
-
-		       /* ADSP (FE) Ports */
-		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
-		       <&adsp_compr1_port>, <&adsp_compr2_port>,
-
-		       /* XBAR I/O ports */
-		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
-		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,
-
-		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
-		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,
-
-		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,
-
-		       /* XBAR HW accelerator ports */
-		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
-		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
-
-		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
-
-		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
-		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
-		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,
-
-		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
-		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
-		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
-		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,
-
-		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
-		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
-		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
-		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
-		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
-
-		       <&xbar_ope1_in_port>,
-
-		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
-		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
-		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
-		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
-		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
-		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
-		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
-		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
-
-		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
-		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
-
-		       /* BE I/O Ports */
-		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
-		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,
-
-		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
-		       <&dmic4_port>,
-
-		       <&dspk1_port>, <&dspk2_port>,
-
-		       /* BE HW accelerator ports */
-		       <&sfc1_out_port>, <&sfc2_out_port>,
-		       <&sfc3_out_port>, <&sfc4_out_port>,
-
-		       <&mvc1_out_port>, <&mvc2_out_port>,
-
-		       <&afc1_out_port>, <&afc2_out_port>,
-		       <&afc3_out_port>, <&afc4_out_port>,
-		       <&afc5_out_port>, <&afc6_out_port>,
-
-		       <&asrc_out1_port>, <&asrc_out2_port>,
-		       <&asrc_out3_port>, <&asrc_out4_port>,
-		       <&asrc_out5_port>, <&asrc_out6_port>,
-
-		       <&mixer_out1_port>, <&mixer_out2_port>,
-		       <&mixer_out3_port>, <&mixer_out4_port>,
-		       <&mixer_out5_port>,
-
-		       <&ope1_out_port>,
-
-		       <&amx1_out_port>, <&amx2_out_port>,
-		       <&amx3_out_port>, <&amx4_out_port>,
-
-		       <&adx1_out1_port>, <&adx1_out2_port>,
-		       <&adx1_out3_port>, <&adx1_out4_port>,
-		       <&adx2_out1_port>, <&adx2_out2_port>,
-		       <&adx2_out3_port>, <&adx2_out4_port>,
-		       <&adx3_out1_port>, <&adx3_out2_port>,
-		       <&adx3_out3_port>, <&adx3_out4_port>,
-		       <&adx4_out1_port>, <&adx4_out2_port>,
-		       <&adx4_out3_port>, <&adx4_out4_port>,
-
-		       /* ADSP related ports */
-		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
-		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
-		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
-		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
-		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
-		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
-		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
-		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
-		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
-		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,
-
-		       <&admaif1_codec_port>, <&admaif2_codec_port>,
-		       <&admaif3_codec_port>, <&admaif4_codec_port>,
-		       <&admaif5_codec_port>, <&admaif6_codec_port>,
-		       <&admaif7_codec_port>, <&admaif8_codec_port>,
-		       <&admaif9_codec_port>, <&admaif10_codec_port>,
-		       <&admaif11_codec_port>, <&admaif12_codec_port>,
-		       <&admaif13_codec_port>, <&admaif14_codec_port>,
-		       <&admaif15_codec_port>, <&admaif16_codec_port>,
-		       <&admaif17_codec_port>, <&admaif18_codec_port>,
-		       <&admaif19_codec_port>, <&admaif20_codec_port>;
-
-		label = "NVIDIA Jetson Concord APE";
-
-		clocks = <&bpmp_clks TEGRA234_CLK_PLLA>,
-			 <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>;
-		clock-names = "pll_a", "plla_out0";
-		assigned-clocks = <&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
-		assigned-clock-parents = <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>;
+		//nvidia-audio-card,mclk-fs = <256>;
 	};
+	hdr40_vdd_3v3: regulator@101 {
+		compatible = "regulator-fixed";
+		reg = <101>;
+		regulator-name = "vdd-3v3-cvb";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+ 	};
 };
 
 /*
@@ -203,7 +103,7 @@
  * platform specific files.
  */
 
-hdr40_snd_link_i2s: &i2s2_to_codec { };
+//hdr40_snd_link_i2s: &i2s2_to_codec { };
 
 /* Override with BT SCO entries */
 &i2s4_to_codec {
@@ -212,9 +112,56 @@ hdr40_snd_link_i2s: &i2s2_to_codec { };
 };
 
 /* Audio graph related bindings */
-hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };
+//hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };
+
+hdr40_snd_i2s_dap_ep: &i2s1_dap_ep { 
+	bitclock-master;
+	frame-master;
+	remote-endpoint = <&sgtl5000_ep>;	
+};
+
 
 &i2s4_dap_ep {
 	dai-format = "dsp_a";
 	bitclock-inversion;
 };
+
+hdr40_snd_link_i2s: &i2s1_to_codec {
+	link-name = "fe-pi-audio-z-v2";
+	bitclock-master;
+	frame-master;
+	codec {
+		sound-dai = <&sgtl5000>;
+		prefix = "H40-SGTL";
+	};
+};
+
+&dp_aux_ch3_i2c {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	sgtl5000: sgtl5000.8-000a@0a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+
+		clocks = <&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
+		//clocks = <&sgtl5000_mclk>;
+		clock-names = "extern1";
+
+		micbias-resistor-k-ohms = <2>;
+		micbias-voltage-m-volts = <3000>;
+		//VDDA-supply = <&p3737_vdd_3v3_sys>;
+		//VDDIO-supply = <&p3737_vdd_3v3_sys>;
+		VDDA-supply = <&hdr40_vdd_3v3>;
+		VDDIO-supply = <&hdr40_vdd_3v3>;
+		#sound-dai-cells = <0>;
+		sound-name-prefix = "H40-SGTL";
+		status = "okay";
+		port {
+			sgtl5000_ep: endpoint {
+				remote-endpoint = <&hdr40_snd_i2s_dap_ep>;
+				link-name = "fe-pi-audio-z-v2";
+			};
+		};
+	};
+};

2, The following is the codec register value:

 sudo cat /sys/kernel/debug/regmap/8-000a/registers
000: a011
002: 0070
004: 0008
006: 01b0
00a: 0010
00e: 0200
010: 3c3c
014: 015f
020: 0000
022: 6161
024: 0023
026: 0068
028: 01f1
02a: 0170
02c: 0322
02e: 0101
030: 72fb
032: 7599
034: 0000
036: 0017
03a: 0000
03c: 0000
100: 0011
102: 0000
104: 0040
106: 051f
108: 0003
10a: 0040
10c: 0000
10e: 0000
110: 0000
116: 002f
118: 002f
11a: 002f
11c: 002f
11e: 002f
120: 8000
122: 0000
124: 5100
126: 1473
128: 0028
12a: 0050
12c: 0000
12e: 0000
130: 0000
132: 0000
134: 0000
136: 0000
138: 0000
13a: 0000

I found that the MUTE_ADC bit of the sgtl5000 codec chip 0x0024 register is always enabled
SGTL5000.pdf (2.4 MB)

3, amixer -c APE contents > contents.txt, an error was reported here:

amixer: Control hw:1 element TLV read error: No such device or address
numid=451,iface=MIXER,name='H40-SGTL AVC Hard Limiter Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off
numid=453,iface=MIXER,name='H40-SGTL AVC Integrator Response'
  ; type=INTEGER,access=rw------,values=1,min=0,max=3,step=0
  : values=1
numid=452,iface=MIXER,name='H40-SGTL AVC Max Gain Volume'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=2,step=0
  : values=1
  | dBscale-min=0.00dB,step=6.00dB,mute=0
numid=450,iface=MIXER,name='H40-SGTL AVC Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off
numid=454,iface=MIXER,name='H40-SGTL AVC Threshold Volume'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=96,step=0
  : values=12
  | dBminmax-min=0.00dB,max=96.00dB
numid=455,iface=MIXER,name='H40-SGTL BASS 0'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=95,step=0
  : values=47
  | dBscale-min=-11.75dB,step=0.25dB,mute=0
numid=456,iface=MIXER,name='H40-SGTL BASS 1'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=95,step=0
  : values=47
  | dBscale-min=-11.75dB,step=0.25dB,mute=0
numid=457,iface=MIXER,name='H40-SGTL BASS 2'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=95,step=0
  : values=47
  | dBscale-min=-11.75dB,step=0.25dB,mute=0
numid=458,iface=MIXER,name='H40-SGTL BASS 3'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=95,step=0
  : values=47
  | dBscale-min=-11.75dB,step=0.25dB,mute=0
numid=459,iface=MIXER,name='H40-SGTL BASS 4'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=95,step=0
  : values=47
  | dBscale-min=-11.75dB,step=0.25dB,mute=0
numid=439,iface=MIXER,name='H40-SGTL Capture Attenuate Switch (-6dB)'
  ; type=BOOLEAN,access=rw---R--,values=1
  : values=off
  | dBscale-min=-6.00dB,step=6.00dB,mute=0
numid=1497,iface=MIXER,name='H40-SGTL Capture Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=2
  ; Item #0 'MIC_IN'
  ; Item #1 'LINE_IN'
  : values=0
numid=441,iface=MIXER,name='H40-SGTL Capture Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=off
numid=438,iface=MIXER,name='H40-SGTL Capture Volume'
  ; type=INTEGER,access=rw------,values=2,min=0,max=15,step=0
  : values=0,0
numid=440,iface=MIXER,name='H40-SGTL Capture ZC Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
numid=1501,iface=MIXER,name='H40-SGTL DAP MIX Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=2
  ; Item #0 'ADC'
  ; Item #1 'I2S'
  : values=0
numid=448,iface=MIXER,name='H40-SGTL DAP Main channel'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=65535,step=0
  : values=32768
  | dBscale-min=0.00dB,step=0.01dB,mute=0
numid=449,iface=MIXER,name='H40-SGTL DAP Mix channel'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=65535,step=0
  : values=0
  | dBscale-min=0.00dB,step=0.01dB,mute=0
numid=1500,iface=MIXER,name='H40-SGTL DAP Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=2
  ; Item #0 'ADC'
  ; Item #1 'I2S'
  : values=0
numid=1499,iface=MIXER,name='H40-SGTL Digital Input Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=4
  ; Item #0 'ADC'
  ; Item #1 'I2S'
  ; Item #2 'Rsvrd'
  ; Item #3 'DAP'
  : values=1
numid=1498,iface=MIXER,name='H40-SGTL Headphone Mux'
  ; type=ENUMERATED,access=rw------,values=1,items=2
  ; Item #0 'DAC'
  ; Item #1 'LINE_IN'
  : values=0
numid=443,iface=MIXER,name='H40-SGTL Headphone Playback Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
numid=442,iface=MIXER,name='H40-SGTL Headphone Playback Volume'
  ; type=INTEGER,access=rw---R--,values=2,min=0,max=127,step=0
  : values=30,30
  | dBscale-min=-51.50dB,step=0.50dB,mute=0
numid=444,iface=MIXER,name='H40-SGTL Headphone Playback ZC Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
numid=447,iface=MIXER,name='H40-SGTL Lineout Playback Switch'
  ; type=BOOLEAN,access=rw------,values=1
  : values=on
numid=446,iface=MIXER,name='H40-SGTL Lineout Playback Volume'
  ; type=INTEGER,access=rw---R--,values=2,min=0,max=31,step=0
  : values=30,30
  | dBscale-min=-15.50dB,step=0.50dB,mute=0
numid=445,iface=MIXER,name='H40-SGTL Mic Volume'
  ; type=INTEGER,access=rw---R--,values=1,min=0,max=3,step=0
  : values=0
  | dBrange-
    rangemin=0,,rangemax=0
      | dBscale-min=0.00dB,step=0.00dB,mute=0
    rangemin=1,,rangemax=3
      | dBscale-min=20.00dB,step=10.00dB,mute=0

numid=437,iface=MIXER,name='H40-SGTL PCM Playback Volume'
  ; type=INTEGER,access=rw---R--,values=2,min=0,max=192,step=0
  : values=192,192

Here is the full file:
contents.txt (783.3 KB)

4, sudo grep "mclk" /sys/kernel/debug/clk/clk_summary

          aud_mclk                                     33       33        0    49151953    49151953          0     0  50000
 sgtl5000-mclk                                          0        0        0    12288000    12288000          0     0  50000

5, cat /etc/nv_tegra_release
# R35 (release), REVISION: 1.0, GCID: 31250864, BOARD: t186ref, EABI: aarch64, DATE: Thu Aug 11 03:37:46 UTC 2022

Thanks a lot.

1 Like

Please check if can gain some ideas from Audio Setup and Development — Jetson Linux Developer Guide documentation (nvidia.com)

Hi
The audio can works now, add the following content to this file:

source/hardware/nvidia/platform/t23x/concord/kernel-dts/cvb/tegra234-p3737-audio.dtsi,

&i2s1_to_codec { 
......
codec-dai-name = "sgtl5000";
codec-dai = <&sgtl5000>;
name-prefix = "H40-SGTL";
......
};

1 Like

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.