SGTL5000 Codec Chip ID read error

Hi All,

I am facing Chip ID read error for my SGTLCodec5000. This error is pointing the sgtl5000 driver .c file.
Please let us know what might be the reason for this. One observation we made on the hardware side is, we are seeing SINE wave on the M_CLK line( 49 MHz) instead of 12 MHz externally coming from SOM module to the SGTL5000 codec on our customized carrier board.

Should we modify this clock value explictly in some driver file ( .c or .h), please let us know.

I am attaching the sound dtsi file, I have modified for reference.

tegra194-audio-p2822-0000_nagesh_20_dec.txt (14.3 KB)

			 //clocks = <&sgtl5000_mclk>;
			 //clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			 //clock-names = "mclk";
			 clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
			 clock-names = "extern1";
  • sgtl node is defined under 2 I2C nodes. Why so?
  • After this change, please share the dmesg logs to check.

Thanks a lot for the updates.

Ok. Is it something to do with the hardware loose connection of codec to I2C or something else?

I added the two functions that are documented here, but it is having some errors due to mismatch of the function “tegra_machine_fepi_init” that is called with out any parameter and it is defined with a parameter. To call this function “tegra_machine_fepi_init” with parameter with *rtd , not finding “struct snd_soc_pcm_runtime *rtd” variable in the function “tegra_machine_fepi_init”.

Cannot we fix this 120000 MHz issue in the device tree file itself, by hard coding the clock rate = 120000, inside the sound { } node ? to avoid the machine_driver.c file changes.

Ok. Disabled it back. Can I know the difference between this and Sound { } node ? I thought we need to enable this graph also for making the audio chain complete for enabling the audio functionality.

As I am getting the clock from AUD_MCLK from my SOM module to the SGTL5000 codec, I commented the sgtl5000_mlck, which was supposed to be used, if we are sending a fixed frequency from on onboard codec oscillator as per my understanding.

Earlier we had connected out SGTL5000 codec on our customized board to I2C0, It was not working.
But later we tried connecting it to I2C4, to see, if it works fine.

I can do this after doing code changes in machine_driver.c file.

Sorry I didn’t get this. It should be automatically called on dai init. As it will be set as the callback like
Audio Setup and Development — Jetson Linux
Developer Guide 34.1 documentation (

Also, please confirm which JP release you are working on.

Jetpack 5.1.2

Please find the tegra_machine_driver.c file attached FYI. I have added those two functions in the documentation and commented it temporarily as they are giving errors:

tegra_machine_driver.txt (12.2 KB)

Now I am not getting chip ID read error

, after making some modifications.
but I am still not able to see

  1. Xavier APE sound card listed still
  2. My AUD_MCLK showing 49 Mhz
  3. Not able to see codec address 0x0a in i2cdetect command on bus I2c4

Pls find the dmesg log and corresponding dtsi file attached FYI.
sgtl500log_28_dec.txt (95.1 KB)
tegra194-audio-p2822-0000_working_Sgtl_clk_regmaps_28_dec.txt (13.8 KB)

pls let me know what needs to be updated to make my sound card listed. Thanks.

Could you please elaborate what did you change?

On DT changes side, please update like below:

  • /* Override with BT SCO entries */ &i2s4_to_codec { //bitclock-master; //bitclock-inversion; //frame-master; //format = "dsp_a"; //i2s by default for codec always //Nagesh - Trident changes start link-name = "fe-pi-audio-z-v2"; codec { //sound-dai = <&sgtl5000> sound-dai = <&sgtl5000 0>; //prefix = “H40-SGTL”; }; };

Replace with below, prefix property should not be removed and replace sound-dai-cells with <0> inside sgtl5000.7-000a@0a when you make below change:
&i2s4_to_codec { link-name = "fe-pi-audio-z-v2"; bitclock-master; frame-master; codec { sound-dai = <&sgtl5000>; prefix = "H40-SGTL"; }; };

  • No need of “nvidia,dai-link-1” node inside sound node .
  • Hope you had disabled “sound-graph” node as mentioned in comment #3.

If still doesnt work, share the updated DT alongwith dmesg logs.

Earlier, I was feeding the clock to the sgtl5000 codec structure through dummy clock structure node( actually this is applicable only for on board oscillator on codec board but here I am getting AUD_MCLK from my SOM module). Now, I removed this and started to send assign clock from the
MCLK from SOM module as shown below:

clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
clock-names = “extern1”;

Actually If I enable prefix here also, I get compile error, as this prefix " prefix = “H40-SGTL”;" would already taken from the sgtl5000: sgtl5000.7-000a@0a { } node.
Please see the documentation for the same in the below link: where it says, we can enable prefix in either of the nodes.

However when I changed the name to " sound-name-prefix " from just “prefix”, it compiled fine.

I have added #sound-dai-cells = <0>; back inside the sgtl5000: sgtl5000.7-000a@0a { } node.

Ok. I am removing it. As it will be taking from the overlay files in other parents folders. Hope my understanding is correct.

Yes, I have disabled it already.


We are able to see Sound card getting registered in AlsaMixer now.
But we are still getting some errors now about clk of PLLOut in the dmesg log.

Please let us know, how to fix this in the sound { } node structure.

tegra194-audio-p2822-0000_sound_card_APE_registered.dtsi.txt (14.0 KB)
dmesg_29Dec_log.txt (107.5 KB)

Don’t change below part, keep it as it was there by default,

	        assigned-clocks = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
				  <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
	        assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
	        //assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

Will this fix the 12 MHz issue, that we need to send for AUD_MCLK.

Also what should be “nvidia-audio-card,mclk-fs = <256>;”
Read it should be changed to 0 so that it will inturn effect our AUD_MCLK to get 12 MHz, as we are using fe-pi module as we were not able to do the source code changes in machine_driver.c

The change you had done above, is trying to set PLLA_OUT0 parent as AUD_MCLK and that is not possible and that’s why you are getting error messages for PLLA_OUT0.

This is not required to be modified.

For machine driver change, it will be already part of tegra_codecs.c. Please check with link-name compatible.


Ok. I had set it to 0. I will revert it back 256, Does this effect my audio mic in, speaker out, line out etc working/functionalities in the next phase of testing.

Yes. I saw tegra_codecs.c file. They have function “tegra_machine_fepi_init” incorporated already to handle fe-pi module based sgtl codecs.

I have one more query. I am not able to see the sgtl5000 clk value in the /sys/kernel/debug/clck/clk_summary. Any idea?

As I am feeding AUD_MCLK as clock input inside sgtl5000.7-000a@0a node, it should also list.
I am remember it was listing some times, before.

AUD_MCLK is showing 49 Hz in the clk_summary, after reverting back the changes for Clocks inside Sound { } node.
But we need 12 MHz to be feeded to the codec. Will this effect our audio functionality on i2s and codec input/output lines

In your last shared DT, “nvidia-audio-card,mclk-fs = <0>;”
did you change it to 256?
If yes, please share the updated DT alongwith dmesg logs.

Are you running any usecase before reading aud_mclk? If yes, what’s the sampling rate.

Thanks a lot for the response.
I will change “mclk-fs” to 256 and share the updated DT and dmesg log.

But have some queries:

  1. Should it be 256 or 0 for correction audio functionality? because as of now line-in, line-out is not working, even though the Sound+Card APE is registered successfully.
  2. Are there any commands that we need to execute after Sound card registration for bringing up Audio In and Audio out? as per the below link:

Did not understand, what does use case mean here?
As per our hardware team , we are not running any usecase. The sampling rate was 0 in this build.
I will try to modify it so 256 and let you know.

Pls find the updated dtsi file and dmesg log attached below.

tegra194-audio-p2822-0000_sound_Card_Registered_5_Jan.txt (15.5 KB)

dmesg_snd_registered_log.txt (71.8 KB)

We see that APE sound card is getting registered successfully. But not able to heard sound when we test( by playing sound) it through ALSAMIXER.

Also we tried the below steps from the below link as part of diagnosing, but we are not getting any output when execute this below command to determine whether DAPM path is completed or not by using the command:

$ for i in find /sys/kernel/debug/tracing/events -name "enable" | grep snd_soc_; do echo 1 > $i; done

Pls find the log of the same command attached here.
asoc_err.txt (143 Bytes)

Kindly provide further steps to be followed to fix this issue.

Note: Our I2S3 and I2S4 are intervened as per schematics diagram for Jetson AGX Xavier Industrial.
For outside world it is I2S4 only.

  • Your command went wrong here. single quote before find is wrong. Please copy from link again.

Please share the amixer / aplay commands you are running. Is there any error on the shell when you ran the command.

  • tegra i2s is master or the codec is master in your test.

  • Please probe I2S lines using oscilloscope and check the I2S lines.

I have closed the single quote before “find” after “grep_snd_soc” as shown below. Pls check in the log file

'find /sys/kernel/debug/tracing/events -name “enable” | grep snd_soc_`

Replace " 'find " with " `find " it will work