Default GPIO value not being maintained

NX Carrier Board
JP: 32.6.1

This thread is a continuation from the following topic: setting-default-gpio-value-for-xavier-nx-dev-board

I have set the pins 16 and 18 to output low (see attached cfg). It seems however that the default value is easily pulled from its initial state by small levels of capacitive loading and can latch high depending on where the level translator falls after oscillation.

(Note: Setting the pin values via the cfg seems to be working as I have been able to set 16/18 high)

If I drive the signal low after boot up with the Jetson.GPIO library, the pin remains low during operation. I’d like this to be the case with the initial boot value.

What is the difference between setting the default value of the pin and by setting the value via sysfs (through Jetson.GPIO)?

tegra19x-mb1-pinmux-p3668-a01.cfg (27.4 KB)

hello KRXK,

could you please access to the Carrier Board Specification.
there’s note, in page-25.

Any pull-up or pull-down resistors on the signals (except I2C) must be weak (limited to >50kΩ)

Hi @JerryChang,

The system we have it connected to has 100K pull downs so should be more than sufficiently weak enough.

As I said when using sysfs there is no issue with the signal maintaining its value.

Hi, have you checked below 40-pin header docs? There are some requests to the load/design of the pins.

https://developer.nvidia.com/jetson-nano-developer-kit-40-pin-expansion-header-gpio-usage-considerations-applications-note