I’m trying to implement GPIO bitbang on Orin NX through /dev/mem because of speed considerations.
I’m trying to access PN.01, which has addresses from 0x2212220 to 0x2212234.
PN.01 is line 85 in gpiochip0. If I toggle it with “gpioset” I can see the pin change via oscilloscope.
Also I can see the registers change with “devmem2”. Eg. “devmem2 0x2212230” shows the updated OUTPUT_VALUE register.
But if I write to it with devmem2 it doesn’t change the pin state. The register value gets updated but the pin state doesn’t change.
The same happens if I write a small program which opens /dev/mem and mmap’s the proper address: I can write to OUTPUT_VALUE register, I can see the register change but the pin state doesn’t change. I tried other GPIO pins with the same outcome: registers change, but the pin state doesn’t.
Do I need to write other registers too for the OUTPUT_VALUE to take effect?
I’m using SeeedStudio recomputer J401 with Orin NX SOM.
Thanks for any help!
OK, RTFM helped. :)
The relevant documentation is Jetson Orin NX and Nano Series — Jetson Linux Developer Guide documentation
It was the PADCTL register. For some reason after “gpioset” the PADCTL register is set to SFIO. If I revert it to GPIO, I can reach about 2.5MHz bitbang frequency. (My target was 1MHz.)
In the actual case, for PN.01 the GPIO name is “SOC_GPIO39”, the PADCTL is “EDP” which is “PADCTL_A16” at address 0x2440000, and PADCTL_EDP_SOC_GPIO39_0 register offset is 0x20. “devmem2 0x2440020 w 0” made GPIO work.
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