I am designing a custom board which has a TFT LCD with LVDS interface. But other control pins of the LCD has to be drive with a +3.3V supply. But according to the user guide of the Tegra TK1 I have to use
AVDD_LVDS0_IO = +1.05V in LVDS mode. Which apparently make all GPIO related to LVDS to be 1.05V.
Or else are there any other pin I can supply with different voltage?
Do I have to use 1.05V /3.3V voltage level translator?
Or Can I supply AVDD_LVDS0_PLL to be 3.3V?
AVDD_LVDS0_IO = +1.05V is for data lanes, AVDD_LVDS0_PLL is 3.3V… it can be used to supply control pins.