Enabling CONFIG_PCIE_TEGRA_DW_DMA_TEST jetson xavior

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

Hi,
Currently we are having a setup like one jetson xavier acts as RC and another jetson xavior acts as Endpoint.

In that, I want to try the dma test code provided in the nvidia/drivers/pci/dwc/pcie-tegra.c.
I understood from the code we can test the dma engine using the debugfs from userspace
But when i try to enable CONFIG_PCIE_TEGRA_DW_DMA_TEST thru make menuconfig command, i couldn’t found CONFIG_PCIE_TEGRA_DW_DMA_TEST options.

When i try to search

image
image1044×302 35.3 KB

but inside bus support feature there is no Nvidia Tegra PCIe host controller option.

Can you please help us?

3

looks like some basic issue with the defconfig file itself? Are you using tegra_defconfig or a different one?

4

I’m using tegra_defconfig.

5

what is the L4T BSP version being used here?

6

Hi ,
I have added a macro directly to source file itself. Now debugfs files available related to dma in /sys/kernel/debug/pcie-5 directory.

I tried to test the dma by writing 0xc0000000(This is the address printed when memory allocated using dma_alloc_coherent) as src address, 0x1f40000000(This is the address mapped for bar0) as dst address , channel number as 0 and size as 0x100.

I tried in polling method by adding dma-poll in device tree.

after performing write operation by opening write file, i checked the dmesg log, it printed DMA write passed.

But when i checked the data from userspace using devmem application, the data present in location 0x1f40000000 and 0xc0000000 are different.

Can you please check what im doing wrong here?

7

Could you please tell me the BSP version being used here?

8

Jetpack 4.4

9

Hi,
Is there any update on this?

10

First things first…
the PCIE_TEGRA_DW_DMA_TEST option is indeed present in the config menu under ‘Bus support’. Please check the below screenshot.

DMA_TEST_Option_with_tegra_defconfig
DMA_TEST_Option_with_tegra_defconfig1503×910 200 KB

Regarding the data not being equal, the source address here i.e. 0xC0000000 is an IOVA address and NOT the physical address ¶. The input argument to devmem should always be a PA and hence the data at 0xC0000000 PA would not be equal to the data at 0xC0000000 IOVA address (for which the physical address equivalent would be at a different place, certainly not at 0xC0000000 PA).
It is for this reason that the below code is added to use the CPU-VA for comparison purposes (FWIW, dma_alloc_coherent() gives returns two addresses pointing to the same location viz. CPU-VA to be used by the CPU and IOVA to be used by the PCIe controller)

/* compare copied data */
if (!memcmp(pcie->cpu_virt_addr, dst_cpu_virt, pcie->size))
        dev_info(pcie->dev, "DMA-Write test PASSED\n");
else
        dev_info(pcie->dev, "DMA-Write test FAILED\n");

Hope this clarifies.