Enabling SPI and SPIDEV on the TX2

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2
1

Hello,

I’ve been working on enabling SPI 1 and SPIDEV modules on the TX2, and I’ve been having a hard time finding specific documentation on how to go about that. To summarize where I am at, I can modify and load a custom modified dtb to the kernel. However, I am unsure exactly how to configure the dtb to enable SPI 1 (since I assume it’s not enabled by default) and to operate and how to load the SPIDEV module.

So far, I’ve been mostly using the elinux guide for enabling SPI and SPIDEV for the TX1: [url]http://elinux.org/Jetson/TX1_SPI[/url].

To enable modification of the dtb in the manner described by this guide, I followed cospan’s post that describes how to modify the extlinux.conf file to load a custom dtb: https://devtalk.nvidia.com/default/topic/1001443/?comment=5132310

I’ve not made any crazy changes to the dtb, only adding “spidev” to the compatible line in spi@c260000 (which I believe handles SPI1). I don’t really understand the correct path going forward to go about enabling the pins for SPI1 for the TX2 specifically if they aren’t already enabled. I know there is a spreadsheet that generates device tree include files based on how you want pins configured, but I’m not really clear on how you utilize it or if it would really be helpful in my case.

Additionally, I’ve attempted to follow the elinux guide mentioned above to install the SPIDEV module using the new 27.1 L4T source, however I can’t get the ‘make prepare’ command to take, so I’m stuck there as well.

I apologize if any of these questions are NOOBish, and I would appreciate any help I can get. Let me know if I need to clarify anything.

2

Hi dmays
For how to build the kernel and DTB you can download document from the download link. And you can see like below.
External Media
External Media

3

Thanks Shane, I was finally able to build the spidev module from the kernel source. I actually needed to be in the /kernel-4.4 directory of the uncompressed kernel source to run the make commands. D’oh!

The spidev module did not end up running on boot after this, likely because I haven’t configured my DTB properly. I forced it to load by modifying /etc/modules-load.d/modules.conf, making it show up with lsmod. But again since my DTB is likely not configured properly, spidev does not show up in /dev.

I guess my next question is how to go about figuring out how to properly configure the GPIO pins in the DTB to enable SPI (specifically SPI1, which is broken out in J21) and utilize spidev. I assume the easiest way is to use the pinmux spreadsheet and figure out how to integrate the dts files into the final dtb. From there I assume I would add “spidev” as a compatible in that dtb for SPI1 to fully enable spidev control. I’ve never delved this deep into embedded linux before, so any direction would be helpful.

4

Dmays
You need add below to your device tree for the spidev

spi@c260000 {
                status = "okay";
               spidev@0 {
                       compatible = "spidev";
                       reg = <0>;
                       spi-max-frequency=<25000000>;
               };
               spidev@1 {
                       compatible = "spidev";
                       reg = <1>;
                       spi-max-frequency=<25000000>;
               };
        };
5

Thanks for the reply, I implemented the changes you provided to the device tree. Spidev shows in /dev/ even without the forced loading of the module in /etc/modules-load.d/modules.conf. However, the loopback test does not seem to work. A logic analyzer looking at pins 19 (MOSI) and 21 (MISO) on J21 confirms there is no data transaction. Below is the spi@c260000 node as I have it configured. I disabled the spi-touch-sharp19x12@0 sub-node, but it has no effect either way.

spi@c260000 {
		compatible = "nvidia,tegra186-spi";
		reg = <0x0 0xc260000 0x0 0x10000>;
		interrupts = <0x0 0x25 0x4>;
		nvidia,dma-request-selector = <0x18 0x10>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		#stream-id-cells = <0x1>;
		dmas = <0x18 0x10 0x18 0x10>;
		dma-names = "rx", "tx";
		nvidia,clk-parents = "pll_p", "osc";
		spi-max-frequency = <0xb71b00>;
		clocks = <0xd 0xde 0xd 0x10d 0xd 0x264>;
		clock-names = "spi", "pll_p", "osc";
		resets = <0xd 0x29>;
		reset-names = "spi";
		status = "okay";
		linux,phandle = <0x7c>;
		phandle = <0x7c>;
		spidev@0 {
                        compatible = "spidev";
                        reg = <0>;
                        spi-max-frequency=<25000000>;
                };
                spidev@1 {
                        compatible = "spidev";
                        reg = <1>;
                        spi-max-frequency=<25000000>;
                };
		spi-touch-sharp19x12@0 {
			avdd-supply = <0x2f>;
			dvdd-supply = <0x30>;
			status = "disabled";
			compatible = "sharp,lr388k7_ts";
			reg = <0x0>;
			spi-max-frequency = <0xb71b00>;
			irq-gpio = <0x1b 0x2f 0x1>;
			interrupt-parent = <0x1b>;
			interrupts = <0x2f 0x1>;
			reset-gpio = <0x1b 0x3 0x0>;
			clock-sel-gpio = <0x31 0x1 0x0>;
			x-max = <0x2580>;
			y-max = <0x3c00>;
			z-max = <0xffff>;
			flip-x = <0x1>;
			flip-y = <0x1>;
			touch-num-max = <0xa>;
			platform-id = <0x1>;
		};

		prod-settings {
			mask-one-style;

			prod_c_cs0 {
				prod = <0x4 0xfc0 0x400>;
			};
		};
	};
6

Hi dmays
The SPI pin group in the J21 looks like map to TX2 SPI4, You may need enable the spidev node to spi@3240000

7

Thanks, you are correct. Referencing the spreadsheet file revealed SPI4 is actually mapped to the SPI1 pins in the J21 header. Who would have thought that? Adding the spidev sub nodes that you provided to spi@3240000 enabled those pins to work, even CS0. Thanks again.

8

The Jetson pin naming confusion is legendary!

9

You will get used to it over time.