I’ve been working on enabling SPI 1 and SPIDEV modules on the TX2, and I’ve been having a hard time finding specific documentation on how to go about that. To summarize where I am at, I can modify and load a custom modified dtb to the kernel. However, I am unsure exactly how to configure the dtb to enable SPI 1 (since I assume it’s not enabled by default) and to operate and how to load the SPIDEV module.
So far, I’ve been mostly using the elinux guide for enabling SPI and SPIDEV for the TX1: http://elinux.org/Jetson/TX1_SPI.
To enable modification of the dtb in the manner described by this guide, I followed cospan’s post that describes how to modify the extlinux.conf file to load a custom dtb: https://devtalk.nvidia.com/default/topic/1001443/?comment=5132310
I’ve not made any crazy changes to the dtb, only adding “spidev” to the compatible line in spi@c260000 (which I believe handles SPI1). I don’t really understand the correct path going forward to go about enabling the pins for SPI1 for the TX2 specifically if they aren’t already enabled. I know there is a spreadsheet that generates device tree include files based on how you want pins configured, but I’m not really clear on how you utilize it or if it would really be helpful in my case.
Additionally, I’ve attempted to follow the elinux guide mentioned above to install the SPIDEV module using the new 27.1 L4T source, however I can’t get the ‘make prepare’ command to take, so I’m stuck there as well.
I apologize if any of these questions are NOOBish, and I would appreciate any help I can get. Let me know if I need to clarify anything.