Failed to drive OV5693 on JetPack4.2.2

Hi,

When driving OV5693 on TX2, the system prompts “ov5693 2-0030: Failed to find clocks”
The system version is JetPack4.2.2

[    3.727950] tegra_rtc c2a0000.rtc: rtc core: registered c2a0000.rtc as rtc1
[    3.727975] tegra_rtc c2a0000.rtc: Tegra internal Real Time Clock
[    3.728188] i2c /dev entries driver
[    3.730735] ===========OV5693-probe-start===============
[    3.730736] ov5693 2-0030: [ov5693]: probing v4l2 sensor at addr 0x30.
[    3.730806] ===of_property_read_string====mclk in DT: (null)
[    3.730815] ====of_property_read_string== err====:-22
[    3.730819] ====of_get_property== prop====:(null)
[    3.730822] ====of_get_property== proplen====:0
[    3.730828] ov5693 2-0030: Failed to find clocks
[    3.730833] ov5693 2-0030: unable to get platform data
[    3.730938] ov5693: probe of 2-0030 failed with error -14
[    3.732704] max77620-power max77620-power: Event recorder REG_NVERC : 0x0
[    3.739414] parse_throttle_dt_data: Num cap clks = 4
[    3.739420] parse_throttle_dt_data: clk=mcpu type=1
[    3.739424] parse_throttle_dt_data: clk=bcpu type=2
[    3.739433] parse_throttle_dt_data: clk=gpu type=4
[    3.739437] parse_throttle_dt_data: clk=emc type=3
[    3.740651] tegra_throttle_probe: probe successful. #cdevs=4
[    3.741259] FAN dev name: pwm-fan
[    3.741320] FAN:gpio request success.
[    3.741329] FAN: can't find tach_gpio
[    3.741359] pwm_fan_driver pwm-fan: cap state:7, cap pwm:255
[    3.741674] pwm_fan_driver pwm-fan: got pwm for fan. polarity is inversed

How to Drive OV5693 on JetPack4.2.2?

Thanks.

This ov5693 is your design HW?

Hi,

Yes, Our own designed hardware, the camera model is OV5693.

Hi,

The following error occurred when TX2 used the camera to display images.

nvidia@tegra:~$ gst-launch-1.0 nvarguscamerasrc ! 'video/x-raw(memory:NVMM), width=1920, height=1080, format=(string)NV12, framerate=(fraction)30/1' ! nvoverlaysink -e
Setting pipeline to PAUSED ...
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:521 No cameras available
Got EOS from element "pipeline0".
Execution ended after 0:00:00.070336928
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
Setting pipeline to NULL ...
Freeing pipeline ...

What caused this error? How to deal with it?

Thanks.

Please have a check below to implement your own device tree for your sensor board.

https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%2520Linux%2520Driver%2520Package%2520Development%2520Guide%2Fcamera_sensor_prog.html%23

Hi,ShaneCCC

Is the camera driver imx185_v1.c available in JetPack 4.2.2?

Thanks.

I would suggest to use v2 instead of v1. Even it may be working for J4.2.2

Hi, ShaneCCC

Thank you for your guidance.
I ran the video output command without an image and with the following error.

[  343.056868] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  343.063302] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  343.073183] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x00000006
[  343.081915] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00010060
[  343.089777] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00010060
[  343.300957] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  343.307488] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  343.317504] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000e
[  343.326276] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000000e0
[  343.334218] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000000e0
[  343.544936] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  343.551431] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  343.561412] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000e
[  343.570169] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000100e0
[  343.578022] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000100e0
[  343.788944] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  343.795437] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  343.805461] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000e
[  343.814262] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000000e0
[  343.822144] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000000e0
[  344.032885] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  344.039428] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  344.049424] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x00000006
[  344.058255] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x00010060
[  344.066127] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x00010060
[  344.276935] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  344.283421] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  344.293440] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000e
[  344.302207] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000100c0
[  344.310088] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000100c0
[  344.520984] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  344.527563] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  344.537645] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERROR_STATUS2VI_VC1 = 0x0000000e
[  344.546399] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) INTR_STATUS 0x000100e0
[  344.554241] nvcsi 150c0000.nvcsi: csi4_stream_check_status (0) ERR_INTR_STATUS 0x000100e0
[  344.764940] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
root@tegra:~# cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 4281/4281   #P:4
#
#                              _-----=> irqs-off
#                             / _----=> need-resched
#                            | / _---=> hardirq/softirq
#                            || / _--=> preempt-depth
#                            ||| /     delay
#           TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#              | |       |   ||||       |         |
        v4l2-ctl-19713 [000] ....  4355.297125: tegra_channel_open: vi-output, ov5693 2-0030
        v4l2-ctl-19713 [000] ....  4355.298347: tegra_channel_set_power: ov5693 2-0030 : 0x1
        v4l2-ctl-19713 [000] ....  4355.298365: camera_common_s_power: status : 0x1
        v4l2-ctl-19713 [000] ....  4355.299003: tegra_channel_set_power: 150c0000.nvcsi--2 : 0x1
        v4l2-ctl-19713 [000] ....  4355.299009: csi_s_power: enable : 0x1
        v4l2-ctl-19713 [000] ....  4355.308433: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt c8
 vi-output, ov56-19714 [003] ....  4355.308553: tegra_channel_set_stream: enable : 0x1
 vi-output, ov56-19714 [000] ....  4355.309984: tegra_channel_set_stream: 150c0000.nvcsi--2 : 0x1
 vi-output, ov56-19714 [000] ....  4355.309986: csi_s_stream: enable : 0x1
 vi-output, ov56-19714 [000] ....  4355.310024: tegra_channel_set_stream: ov5693 2-0030 : 0x1
     kworker/4:0-18706 [004] ....  4355.336378: rtos_queue_peek_from_isr_failed: tstamp:136234595412 queue:0x0b4b4500
     kworker/4:0-18706 [004] ....  4355.336383: rtcpu_start: tstamp:136234596394
     kworker/4:0-18706 [004] ....  4355.336385: rtos_queue_send_from_isr_failed: tstamp:136234604950 queue:0x0b4a7258
     kworker/4:0-18706 [004] ....  4355.336385: rtos_queue_send_from_isr_failed: tstamp:136234605062 queue:0x0b4aad68
     kworker/4:0-18706 [004] ....  4355.336386: rtos_queue_send_from_isr_failed: tstamp:136234605168 queue:0x0b4ac998
     kworker/4:0-18706 [004] ....  4355.336387: rtos_queue_send_from_isr_failed: tstamp:136234605275 queue:0x0b4ae518
     kworker/4:0-18706 [004] ....  4355.336388: rtos_queue_send_from_isr_failed: tstamp:136234605378 queue:0x0b4af2d8
     kworker/4:0-18706 [004] ....  4355.336388: rtos_queue_send_from_isr_failed: tstamp:136234605483 queue:0x0b4b0098
     kworker/4:0-18706 [004] ....  4355.336389: rtos_queue_send_from_isr_failed: tstamp:136234605588 queue:0x0b4b0e58
     kworker/4:0-18706 [004] ....  4355.336389: rtos_queue_send_from_isr_failed: tstamp:136234605693 queue:0x0b4b1c18
     kworker/4:0-18706 [004] ....  4355.336391: rtos_queue_send_failed: tstamp:136234606164 queue:0x0b4a7258
     kworker/4:0-18706 [004] ....  4355.336392: rtos_queue_send_from_isr_failed: tstamp:136234607986 queue:0x0b4a7258
     kworker/4:0-18706 [004] ....  4355.336393: rtos_queue_send_from_isr_failed: tstamp:136234608092 queue:0x0b4aad68
     kworker/4:0-18706 [004] ....  4355.336393: rtos_queue_send_from_isr_failed: tstamp:136234608199 queue:0x0b4ac998
     kworker/4:0-18706 [004] ....  4355.336394: rtos_queue_send_from_isr_failed: tstamp:136234608305 queue:0x0b4ae518
     kworker/4:0-18706 [004] ....  4355.336394: rtos_queue_send_from_isr_failed: tstamp:136234608410 queue:0x0b4af2d8
     kworker/4:0-18706 [004] ....  4355.336395: rtos_queue_send_from_isr_failed: tstamp:136234608515 queue:0x0b4b0098
     kworker/4:0-18706 [004] ....  4355.336396: rtos_queue_send_from_isr_failed: tstamp:136234608620 queue:0x0b4b0e58
     kworker/4:0-18706 [004] ....  4355.336396: rtos_queue_send_from_isr_failed: tstamp:136234608726 queue:0x0b4b1c18
     kworker/4:0-18706 [004] ....  4355.336397: rtos_queue_send_failed: tstamp:136234609709 queue:0x0b4a7258
     kworker/4:0-18706 [004] ....  4355.336399: rtcpu_vinotify_event: tstamp:136234662173 tag:CSIMUX_STREAM channel:0xff frame:1 vi_tstamp:136234661792 data:0x00000001
     kworker/4:0-18706 [004] ....  4355.444297: rtcpu_vinotify_event: tstamp:136237750244 tag:CSIMUX_FRAME channel:0x01 frame:2 vi_tstamp:136237749858 data:0x000000a0
     kworker/4:0-18706 [004] ....  4355.500320: rtos_queue_peek_from_isr_failed: tstamp:136239595760 queue:0x0b4b4500
     kworker/4:0-18706 [004] ....  4355.500328: rtcpu_vinotify_event: tstamp:136239971884 tag:CSIMUX_FRAME channel:0x01 frame:516 vi_tstamp:136239971477 data:0x00600060
 vi-output, ov56-19714 [005] ....  4355.665372: tegra_channel_capture_setup: vnc_id 0 W 1280 H 720 fmt c8
 vi-output, ov56-19714 [005] ....  4355.665413: tegra_channel_capture_frame: sof:-549619122468.-271104496128
     kworker/4:0-18706 [004] ....  4355.668144: rtcpu_vinotify_event: tstamp:136244415114 tag:CSIMUX_FRAME channel:0x01 frame:516 vi_tstamp:136244414718 data:0x00200060
     kworker/4:0-18706 [004] ....  4355.668151: rtos_queue_peek_from_isr_failed: tstamp:136244595768 queue:0x0b4b4500
     kworker/4:0-18706 [004] ....  4355.668155: rtos_queue_send_from_isr_failed: tstamp:136245233572 queue:0x0b4a7258
     kworker/4:0-18706 [004] ....  4355.668157: rtos_queue_send_from_isr_failed: tstamp:136245233720 queue:0x0b4aad68
     kworker/4:0-18706 [004] ....  4355.668159: rtos_queue_send_from_isr_failed: tstamp:136245233861 queue:0x0b4ac998
     kworker/4:0-18706 [004] ....  4355.668160: rtos_queue_send_from_isr_failed: tstamp:136245234001 queue:0x0b4ae518
     kworker/4:0-18706 [004] ....  4355.668162: rtos_queue_send_from_isr_failed: tstamp:136245234139 queue:0x0b4af2d8
     kworker/4:0-18706 [004] ....  4355.668164: rtos_queue_send_from_isr_failed: tstamp:136245234278 queue:0x0b4b0098
     kworker/4:0-18706 [004] ....  4355.668166: rtos_queue_send_from_isr_failed: tstamp:136245234416 queue:0x0b4b0e58
     kworker/4:0-18706 [004] ....  4355.668168: rtos_queue_send_from_isr_failed: tstamp:136245234554 queue:0x0b4b1c18

What command should the following video formats use to output video?

root@tegra:/home/nvidia# v4l2-ctl -d /dev/video0 --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
	Index       : 0
	Type        : Video Capture
	Pixel Format: 'YUYV'
	Name        : YUYV 4:2:2
		Size: Discrete 1280x720
			Interval: Discrete 0.033s (30.000 fps)

	Index       : 1
	Type        : Video Capture
	Pixel Format: 'YUYV'
	Name        : YUYV 4:2:2
		Size: Discrete 1280x720
			Interval: Discrete 0.033s (30.000 fps)

Thanks.

Hi, ShaneCCC

When I use the v4l2-ctl command to output video, the system prompts the following error.

root@tegra:/home/nvidia# v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720,pixelformat=YUYV --set-ctrl bypass_mode=0 --stream-mmap --stream-count=3
VIDIOC_DQBUF: failed: Input/output error
nvidia@tegra:~$ sudo su
root@tegra:/home/nvidia# v4l2-compliance
v4l2-compliance SHA   : not available

Driver Info:
	Driver name   : tegra-video
	Card type     : vi-output, ov5693 2-0030
	Bus info      : platform:15700000.vi:0
	Driver version: 4.9.140
	Capabilities  : 0x84200001
		Video Capture
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps   : 0x04200001
		Video Capture
		Streaming
		Extended Pix Format

Compliance test for device /dev/video0 (not using libv4l2):

Required ioctls:
	test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
	test second video open: OK
	test VIDIOC_QUERYCAP: OK
	test VIDIOC_G/S_PRIORITY: OK
	test for unlimited opens: OK

Debug ioctls:
	test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
	test VIDIOC_LOG_STATUS: OK

Input ioctls:
	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
	test VIDIOC_ENUMAUDIO: OK (Not Supported)
	test VIDIOC_G/S/ENUMINPUT: OK
	test VIDIOC_G/S_AUDIO: OK (Not Supported)
	Inputs: 1 Audio Inputs: 0 Tuners: 0

Output ioctls:
	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
	Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
	test VIDIOC_G/S_EDID: OK (Not Supported)

Test input 0:

	Control ioctls:
		warn: v4l2-test-controls.cpp(90): Gain: (max - min) % step != 0
		warn: v4l2-test-controls.cpp(90): Exposure: (max - min) % step != 0
		test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
		test VIDIOC_QUERYCTRL: OK
		test VIDIOC_G/S_CTRL: OK
		test VIDIOC_G/S/TRY_EXT_CTRLS: OK
		test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
		test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
		Standard Controls: 1 Private Controls: 18

	Format ioctls:
		fail: v4l2-test-formats.cpp(273): duplicate format 56595559 (YUYV)
		test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: FAIL
		fail: v4l2-test-formats.cpp(1184): ret && node->has_frmintervals
		test VIDIOC_G/S_PARM: FAIL
		test VIDIOC_G_FBUF: OK (Not Supported)
		test VIDIOC_G_FMT: OK
		test VIDIOC_TRY_FMT: OK
		test VIDIOC_S_FMT: OK
		test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
		test Cropping: OK (Not Supported)
		test Composing: OK (Not Supported)
		fail: v4l2-test-formats.cpp(1630): node->can_scale && node->frmsizes_count[v4l_format_g_pixelformat(&cur)]
		test Scaling: OK

	Codec ioctls:
		test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
		test VIDIOC_G_ENC_INDEX: OK (Not Supported)
		test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

	Buffer ioctls:
		test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
		test VIDIOC_EXPBUF: OK

Test input 0:


Total: 43, Succeeded: 41, Failed: 2, Warnings: 2
root@tegra:/home/nvidia#

Thanks.

Looks like the signal have problem to get validate data from the MIPI bus.

Hi,Shane

What are the suggestions to solve the problem of obtaining validation data from Mipi bus? I checked the related posts on NVIDIA technical forum, but could not solve this problem.

tegra186-camera-e3326-a00.dtsi

/*
 * Copyright (c) 2015-2019, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/ {
	host1x {
		vi@15700000 {
			num-channels = <1>;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					e3326_vi_in0: endpoint {
						status = "okay";
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_out0>;
					};
				};
			};
		};

		nvcsi@150c0000 {
			num-channels = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						e3326_csi_in0: endpoint@0 {
							status = "okay";
							port-index = <0>;
							bus-width = <4>;
							remote-endpoint = <&e3326_ov5693_out0>;
						};
					};
					port@1 {
						reg = <1>;
						e3326_csi_out0: endpoint@1 {
							status = "okay";
							remote-endpoint = <&e3326_vi_in0>;
						};
					};
				};
			};
		};
	};

	i2c@3180000 {
		status = "okay";
		ov5693_c@30 {
			compatible = "nvidia,ov5693";
			/* I2C device address */
			reg = <0x30>;

			/* V4L2 device node location */
			devnode = "video0";

			/* Physical dimensions of sensor */
			physical_w = "3.674";
			physical_h = "2.738";

			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			avdd-reg = "vana";
			iovdd-reg = "vif";

			/* Sensor output flip settings */
			vertical-flip = "true";

			/**
			* A modeX node is required to support v4l2 driver
			* implementation with NVIDIA camera software stack
			*
			* mclk_khz = "";
			* Standard MIPI driving clock, typically 24MHz
			*
			* num_lanes = "";
			* Number of lane channels sensor is programmed to output
			*
			* tegra_sinterface = "";
			* The base tegra serial interface lanes are connected to
			* Incase of virtual HW devices, use virtual
			* For SW emulated devices, use host
			*
			* phy_mode = "";
			* PHY mode used by the MIPI lanes for this device
			*
			* discontinuous_clk = "";
			* The sensor is programmed to use a discontinuous clock on MIPI lanes
			*
			* dpcm_enable = "true";
			* The sensor is programmed to use a DPCM modes
			*
			* cil_settletime = "";
			* MIPI lane settle time value.
			* A "0" value attempts to autocalibrate based on mclk_multiplier
			*
			*
			*
			*
			* active_w = "";
			* Pixel active region width
			*
			* active_h = "";
			* Pixel active region height
			*
			* pixel_t = "";
			* The sensor readout pixel pattern
			*
			* readout_orientation = "0";
			* Based on camera module orientation.
			* Only change readout_orientation if you specifically
			* Program a different readout order for this mode
			*
			* line_length = "";
			* Pixel line length (width) for sensor mode.
			* This is used to calibrate features in our camera stack.
			*
			* mclk_multiplier = "";
			* Multiplier to MCLK to help time hardware capture sequence
			* TODO: Assign to PLL_Multiplier as well until fixed in core
			*
			* pix_clk_hz = "";
			* Sensor pixel clock used for calculations like exposure and framerate
			*
			*
			*
			*
			* inherent_gain = "";
			* Gain obtained inherently from mode (ie. pixel binning)
			*
			* == Source Control Settings ==
			*
			* Gain factor used to convert fixed point integer to float
			* Gain range [min_gain/gain_factor, max_gain/gain_factor]
			* Gain step [step_gain/gain_factor is the smallest step that can be configured]
			* Default gain [Default gain to be initialized for the control.
			*     use min_gain_val as default for optimal results]
			* Framerate factor used to convert fixed point integer to float
			* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
			* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
			* Default Framerate [Default framerate to be initialized for the control.
			*     use max_framerate to get required performance]
			* Exposure factor used to convert fixed point integer to float
			* For convenience use 1 sec = 1000000us as conversion factor
			* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
			* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
			* Default Exposure Time [Default exposure to be initialized for the control.
			*     Set default exposure based on the default_framerate for optimal exposure settings]
			*
			* gain_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_gain_val = ""; (ceil to integer)
			* max_gain_val = ""; (ceil to integer)
			* step_gain_val = ""; (ceil to integer)
			* default_gain = ""; (ceil to integer)
			* Gain limits for mode
			*
			* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_exp_time = ""; (ceil to integer)
			* max_exp_time = ""; (ceil to integer)
			* step_exp_time = ""; (ceil to integer)
			* default_exp_time = ""; (ceil to integer)
			* Exposure Time limits for mode (us)
			*
			*
			* min_hdr_ratio = "";
			* max_hdr_ratio = "";
			* HDR Ratio limits for mode
			*
			* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
			* min_framerate = "";
			* max_framerate = "";
			* step_framerate = ""; (ceil to integer)
			* default_framerate = ""; (ceil to integer)
			* Framerate limits for mode (fps)
			*/
		    mode0 { //OV5693_MODE_1280X720
				mclk_khz = "25000";
				num_lanes = "4";
				tegra_sinterface = "serial_a";
				phy_mode = "DPHY";
				discontinuous_clk = "no";
				dpcm_enable = "false";
				cil_settletime = "0";

				active_w = "1280";
				active_h = "720";
				mode_type = "yuv";
				pixel_phase = "yuyv";
				csi_pixel_bit_depth = "8";
				readout_orientation = "0";
				line_length = "1280";
				inherent_gain = "1";
				mclk_multiplier = "2.21";
				pix_clk_hz = "50000000";

				gain_factor = "10";
				min_gain_val = "1";/* 1DB*/
				max_gain_val = "16";/* 16DB*/
				step_gain_val = "1";
				default_gain = "1";
				min_hdr_ratio = "1";
				max_hdr_ratio = "64";
				framerate_factor = "1000000";
				min_framerate = "1";/* 2.787078 */
				max_framerate = "30";/* 120*/
				step_framerate = "1";
				default_framerate = "30";/*120000000*/
				exposure_factor = "1000000";
				min_exp_time = "34";/* us */
				max_exp_time = "550385";/* us */
				step_exp_time = "1";
				default_exp_time = "8334";/* us */
				embedded_metadata_height = "1";
			};

			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				status = "okay";

				port@0 {
					status = "okay";
					reg = <0>;
					e3326_ov5693_out0: endpoint {
						status = "okay";
						port-index = <0>;
						bus-width = <4>;
						remote-endpoint = <&e3326_csi_in0>;
					};
				};
			};
		};
	};

	e3326_lens_ov5693@P5V27C {
		min_focus_distance = "0.0";
		hyper_focal = "0.0";
		focal_length = "2.67";
		f_number = "2.0";
		aperture = "2.0";
	};

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <8>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <160000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		* The general guideline for naming badge_info contains 3 parts, and is as follows,
		* The first part is the camera_board_id for the module; if the module is in a FFD
		* platform, then use the platform name for this part.
		* The second part contains the position of the module, ex. “rear” or “front”.
		* The third part contains the last 6 characters of a part number which is found
		* in the module's specsheet from the vender.
		*/
		modules {
			module0 {
				badge = "e3326_front_P5V27C";
				position = "rear";
				orientation = "1";
				drivernode0 {
					status = "okay";
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ov5693 2-0030";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@30";
				};
				drivernode1 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
				};
			};
		};
	};
};

tegra186-quill-camera-e3326-a00.dtsi

#include <t18x-common-modules/tegra186-camera-e3326-a00.dtsi>
#include "dt-bindings/clock/tegra186-clock.h"

#define CAM0_RST_L	TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN	TEGRA_MAIN_GPIO(R, 0)

/* camera control gpio definitions */

/ {
	i2c@3180000 {
	/*modify by lk:org-@36, clock-frequency=24000000*/
		ov5693_c@30 {
			/* Define any required hw resources needed by driver */
			/* ie. clocks, io pins, power sources */
			/* mclk-index indicates the index of the */
			/* mclk-name with in the clock-names array */

			clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
					 <&tegra_car TEGRA186_CLK_PLLP_OUT0>;
			clock-names = "extperiph1", "pllp_grtba";
			mclk = "extperiph1";
			clock-frequency = <25000000>;
			reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
			pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
			vana-supply = <&en_vdd_cam_hv_2v8>;
			vif-supply = <&en_vdd_cam>;
		};
	};

	gpio@2200000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
			label = "cam0-rst", "cam0-pwdn";
		};
	};
};

tegra186-quill-camera-plugin-manager.dtsi

/* E3326 camera board */
		fragment-e3326@0 {
			ids = "3326-*";
			override@0 {
				target = <&e3326_cam0>;
				_overlay_ {
					status = "okay";
				};
			};
			override@1 {
				target = <&cam_module0>;
				_overlay_ {
					status = "okay";
					badge = "e3326_front_P5V27C";
					position = "rear";
					orientation = "1";
				};
			};
			override@2 {
				target = <&cam_module0_drivernode0>;
				_overlay_ {
					status = "okay";
					pcl_id = "v4l2_sensor";
					devname = "ov5693 2-0030";
					proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@30";
				};
			};
			override@3 {
				target = <&cam_module0_drivernode1>;
				_overlay_ {
					status = "okay";
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
				};
			};
			/* Enable VI ports */
			override@4 {
				target = <&vi_base>;
				_overlay_ {
					status = "okay";
					num-channels=<1>;
				};
			};
			override@5 {
				target = <&vi_port0>;
				_overlay_ {
					status = "okay";
				};
			};
			override@6 {
				target = <&e3326_vi_in0>;
				_overlay_ {
					status = "okay";
					port-index = <0>;
					bus-width = <4>;
					remote-endpoint = <&e3326_csi_out0>;
				};
			};
			/* Enable CSI ports */
			override@7 {
				target = <&csi_base>;
				_overlay_ {
					status = "okay";
					num-channels=<1>;
				};
			};
			override@8 {
				target = <&csi_chan0>;
				_overlay_ {
					status = "okay";
				};
			};
			override@9 {
				target = <&csi_chan0_port0>;
				_overlay_ {
					status = "okay";
				};
			};
			override@10 {
				target = <&e3326_csi_in0>;
				_overlay_ {
					status = "okay";
					port-index = <0>;
					bus-width = <4>;
					remote-endpoint = <&e3326_ov5693_out0>;
				};
			};
			override@11 {
				target = <&csi_chan0_port1>;
				_overlay_ {
					status = "okay";
				};
			};
			override@12 {
				target = <&e3326_csi_out0>;
				_overlay_ {
					status = "okay";
					remote-endpoint = <&e3326_vi_in0>;
				};
			};
			/* tegra-camera-platform settings */
			override@13 {
				target = <&tcp>;
				_overlay_ {
					num_csi_lanes = <4>;
					max_lane_speed = <1500000>;
					min_bits_per_pixel = <8>;//org-10
					vi_peak_byte_per_pixel = <2>;
					vi_bw_margin_pct = <25>;
					isp_peak_byte_per_pixel = <5>;
					isp_bw_margin_pct = <25>;
					status = "okay";
				};
			};
			/* GPIO */
			override@14 {
				target = <&{/gpio@2200000}>;
				_overlay_ {
					camera-control-input {
						status = "disabled";
					};
					camera-control-output-low {
						gpio-hog;
						gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
						label = "cam0-rst", "cam0-pwdn";
						output-low;
						status = "okay";
					};
					camera-control-output-high {
						status = "disabled";
					};
				};
			};
			override@15 {
				target = <&{/gpio@c2f0000}>;
				_overlay_ {
					camera-control-input {
						status = "disabled";
					};
				};
			};
		};

You have to make sure the sensor output signal is follow the MPI spec.
You may need to probe the signale to confirm it.

Hi, Shane

I used an oscilloscope to measure CSI signals and have data signals.

Hi,Shane

I found the prompt “ep of_device is not enabled /host1x/vi@15700000” in the log.

[    4.272086] tegra-vi4 15700000.vi: ep of_device is not enabled /host1x/vi@15700000
"nvidia@tegra:~$ gst-launch-1.0 nvarguscamerasrc ! 'video/x-raw(memory:NVMM), width=1920, height=1080, format=(string)NV12, framerate=(fraction)30/1' ! nvoverlaysink -e
Setting pipeline to PAUSED ...
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:521 No cameras available
Got EOS from element "pipeline0".
Execution ended after 0:00:00.070336928
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
Setting pipeline to NULL ...
Freeing pipeline ..."

Hello we are facing similar kind of issue, is the problem solved