Hi,Shane
What are the suggestions to solve the problem of obtaining validation data from Mipi bus? I checked the related posts on NVIDIA technical forum, but could not solve this problem.
tegra186-camera-e3326-a00.dtsi
/*
* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/ {
host1x {
vi@15700000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3326_vi_in0: endpoint {
status = "okay";
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e3326_csi_out0>;
};
};
};
};
nvcsi@150c0000 {
num-channels = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3326_csi_in0: endpoint@0 {
status = "okay";
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e3326_ov5693_out0>;
};
};
port@1 {
reg = <1>;
e3326_csi_out0: endpoint@1 {
status = "okay";
remote-endpoint = <&e3326_vi_in0>;
};
};
};
};
};
};
i2c@3180000 {
status = "okay";
ov5693_c@30 {
compatible = "nvidia,ov5693";
/* I2C device address */
reg = <0x30>;
/* V4L2 device node location */
devnode = "video0";
/* Physical dimensions of sensor */
physical_w = "3.674";
physical_h = "2.738";
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
avdd-reg = "vana";
iovdd-reg = "vif";
/* Sensor output flip settings */
vertical-flip = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
* Incase of virtual HW devices, use virtual
* For SW emulated devices, use host
*
* phy_mode = "";
* PHY mode used by the MIPI lanes for this device
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_multiplier
*
*
*
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* mclk_multiplier = "";
* Multiplier to MCLK to help time hardware capture sequence
* TODO: Assign to PLL_Multiplier as well until fixed in core
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* == Source Control Settings ==
*
* Gain factor used to convert fixed point integer to float
* Gain range [min_gain/gain_factor, max_gain/gain_factor]
* Gain step [step_gain/gain_factor is the smallest step that can be configured]
* Default gain [Default gain to be initialized for the control.
* use min_gain_val as default for optimal results]
* Framerate factor used to convert fixed point integer to float
* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
* Default Framerate [Default framerate to be initialized for the control.
* use max_framerate to get required performance]
* Exposure factor used to convert fixed point integer to float
* For convenience use 1 sec = 1000000us as conversion factor
* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
* Default Exposure Time [Default exposure to be initialized for the control.
* Set default exposure based on the default_framerate for optimal exposure settings]
*
* gain_factor = ""; (integer factor used for floating to fixed point conversion)
* min_gain_val = ""; (ceil to integer)
* max_gain_val = ""; (ceil to integer)
* step_gain_val = ""; (ceil to integer)
* default_gain = ""; (ceil to integer)
* Gain limits for mode
*
* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* step_exp_time = ""; (ceil to integer)
* default_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
* min_framerate = "";
* max_framerate = "";
* step_framerate = ""; (ceil to integer)
* default_framerate = ""; (ceil to integer)
* Framerate limits for mode (fps)
*/
mode0 { //OV5693_MODE_1280X720
mclk_khz = "25000";
num_lanes = "4";
tegra_sinterface = "serial_a";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
active_w = "1280";
active_h = "720";
mode_type = "yuv";
pixel_phase = "yuyv";
csi_pixel_bit_depth = "8";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "2.21";
pix_clk_hz = "50000000";
gain_factor = "10";
min_gain_val = "1";/* 1DB*/
max_gain_val = "16";/* 16DB*/
step_gain_val = "1";
default_gain = "1";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
framerate_factor = "1000000";
min_framerate = "1";/* 2.787078 */
max_framerate = "30";/* 120*/
step_framerate = "1";
default_framerate = "30";/*120000000*/
exposure_factor = "1000000";
min_exp_time = "34";/* us */
max_exp_time = "550385";/* us */
step_exp_time = "1";
default_exp_time = "8334";/* us */
embedded_metadata_height = "1";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@0 {
status = "okay";
reg = <0>;
e3326_ov5693_out0: endpoint {
status = "okay";
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e3326_csi_in0>;
};
};
};
};
};
e3326_lens_ov5693@P5V27C {
min_focus_distance = "0.0";
hyper_focal = "0.0";
focal_length = "2.67";
f_number = "2.0";
aperture = "2.0";
};
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <4>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <8>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
max_pixel_rate = <160000>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. “rear” or “front”.
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vender.
*/
modules {
module0 {
badge = "e3326_front_P5V27C";
position = "rear";
orientation = "1";
drivernode0 {
status = "okay";
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
/* Driver v4l2 device name */
devname = "ov5693 2-0030";
/* Declare the device-tree hierarchy to driver instance */
proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@30";
};
drivernode1 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
};
};
};
};
};
tegra186-quill-camera-e3326-a00.dtsi
#include <t18x-common-modules/tegra186-camera-e3326-a00.dtsi>
#include "dt-bindings/clock/tegra186-clock.h"
#define CAM0_RST_L TEGRA_MAIN_GPIO(R, 5)
#define CAM0_PWDN TEGRA_MAIN_GPIO(R, 0)
/* camera control gpio definitions */
/ {
i2c@3180000 {
/*modify by lk:org-@36, clock-frequency=24000000*/
ov5693_c@30 {
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
/* mclk-index indicates the index of the */
/* mclk-name with in the clock-names array */
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
<&tegra_car TEGRA186_CLK_PLLP_OUT0>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
clock-frequency = <25000000>;
reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&tegra_main_gpio CAM0_PWDN GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vif-supply = <&en_vdd_cam>;
};
};
gpio@2200000 {
camera-control-output-low {
gpio-hog;
output-low;
gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
label = "cam0-rst", "cam0-pwdn";
};
};
};
tegra186-quill-camera-plugin-manager.dtsi
/* E3326 camera board */
fragment-e3326@0 {
ids = "3326-*";
override@0 {
target = <&e3326_cam0>;
_overlay_ {
status = "okay";
};
};
override@1 {
target = <&cam_module0>;
_overlay_ {
status = "okay";
badge = "e3326_front_P5V27C";
position = "rear";
orientation = "1";
};
};
override@2 {
target = <&cam_module0_drivernode0>;
_overlay_ {
status = "okay";
pcl_id = "v4l2_sensor";
devname = "ov5693 2-0030";
proc-device-tree = "/proc/device-tree/i2c@3180000/ov5693_c@30";
};
};
override@3 {
target = <&cam_module0_drivernode1>;
_overlay_ {
status = "okay";
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/e3326_lens_ov5693@P5V27C/";
};
};
/* Enable VI ports */
override@4 {
target = <&vi_base>;
_overlay_ {
status = "okay";
num-channels=<1>;
};
};
override@5 {
target = <&vi_port0>;
_overlay_ {
status = "okay";
};
};
override@6 {
target = <&e3326_vi_in0>;
_overlay_ {
status = "okay";
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e3326_csi_out0>;
};
};
/* Enable CSI ports */
override@7 {
target = <&csi_base>;
_overlay_ {
status = "okay";
num-channels=<1>;
};
};
override@8 {
target = <&csi_chan0>;
_overlay_ {
status = "okay";
};
};
override@9 {
target = <&csi_chan0_port0>;
_overlay_ {
status = "okay";
};
};
override@10 {
target = <&e3326_csi_in0>;
_overlay_ {
status = "okay";
port-index = <0>;
bus-width = <4>;
remote-endpoint = <&e3326_ov5693_out0>;
};
};
override@11 {
target = <&csi_chan0_port1>;
_overlay_ {
status = "okay";
};
};
override@12 {
target = <&e3326_csi_out0>;
_overlay_ {
status = "okay";
remote-endpoint = <&e3326_vi_in0>;
};
};
/* tegra-camera-platform settings */
override@13 {
target = <&tcp>;
_overlay_ {
num_csi_lanes = <4>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <8>;//org-10
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
status = "okay";
};
};
/* GPIO */
override@14 {
target = <&{/gpio@2200000}>;
_overlay_ {
camera-control-input {
status = "disabled";
};
camera-control-output-low {
gpio-hog;
gpios = <CAM0_RST_L 0 CAM0_PWDN 0>;
label = "cam0-rst", "cam0-pwdn";
output-low;
status = "okay";
};
camera-control-output-high {
status = "disabled";
};
};
};
override@15 {
target = <&{/gpio@c2f0000}>;
_overlay_ {
camera-control-input {
status = "disabled";
};
};
};
};