Question about bringing up our modified camera v4l2 driver

Hello,
Sorry to bother you. We are all beginner of camera v4l2 driver in TX1. Now, we input the MIPI CSI clock and data signal whose pixel format is YUV422 8 bits to TX1 on Jetpack 23.2. And the input video data has processed by our hardware ISP. But, we get some error messages when bringing up our modified camera v4l2 driver whose name is ov5600 for Sony IMX290 sensor. Then, I list our modified code, log and error messages for your reference. I also highlight the error messages by bold and italic. Can you kindly help to check this issue and give us some hints ?

=========================================================================================================
Code modify from ov5693_v4l2.c, because board can not control anything to camera, so every control code:

get_frame_length_regs : return 0x7, 0xc0
get_coarse_time_regs: return 0x0, 0x7b, 0xa0
get_coarse_time_short_regs: (direct return)
get_gain_regs: return 0x0, 0x10
_read_reg: direct return 0
_write_reg: direct return 0
_write_table: direct return 0

DTS and board profile code:

static int t210ref_ov5600_power(struct device *dev, int enable) { return 0; }

static struct camera_common_pdata t210ref_ov5600_ab_data = {
.regulators = {
.avdd = “vana”,
.iovdd = “vif”,
},
.use_cam_gpio = 0,
//.pwdn_gpio = 151, /* TEGRA_GPIO_PS7 */
};

/* OV5600 on CSI C of X9281 /
static struct camera_common_pdata t210ref_max9288_solo_data = {
.regulators = {
.avdd = “vana”,
.iovdd = “vif”,
},
//.reset_gpio = 148, /
TEGRA_GPIO_PS4 /
//.pwdn_gpio = 151, /
TEGRA_GPIO_PS7 */
};

static struct i2c_board_info t210ref_max9288_solo_camera_i2c_device = {
I2C_BOARD_INFO(“ov5600_v4l2”, 0x36),
};

static struct tegra_camera_platform_data
t210ref_max9288_solo_camera_platform_data = {
.flip_v = 0,
.flip_h = 0,
.port = TEGRA_CAMERA_PORT_CSI_B,
.lanes = 2,
.continuous_clk = 0,
};

static struct soc_camera_link max9288_iclink = {
.bus_id = 0, /* This must match the .id of tegra_vi01_device /
.board_info = &t210ref_max9288_solo_camera_i2c_device,
.module_name = “ov5600_v4l2”,
.i2c_adapter_id = 6, /
VI2 I2C controller */
.power = t210ref_ov5600_power,
.priv = &t210ref_max9288_solo_camera_platform_data,
.dev_priv = &t210ref_max9288_solo_data,
};

static struct platform_device t210ref_max9288_solo_soc_camera_device = {
.name = “soc-camera-pdrv”,
.id = 0,
.dev = {
.platform_data = &max9288_iclink,
},
};

int t210ref_camera_init(void) {

platform_device_register(
&t210ref_max9288_solo_soc_camera_device);

}

#include “tegra210-platforms/tegra210-jetson-cv-camera-e3326-a00.dtsi”
modiby to:
#include “tx1_camera_single.dtsi”

tx1_camera_single.dtsi:

#include <dt-bindings/media/camera.h>
#include <dt-bindings/platform/t210/t210.h>

#define CAM0_RST_L TEGRA_GPIO(S, 4)
#define CAM0_PWDN TEGRA_GPIO(S, 7)

/ {
ov5600_b@36 {
compatible = “nvidia,ov5600”;
mode0 { // OV5600_MODE_1920X1080
mclk_khz = “24000”;
num_lanes = “2”;
tegra_sinterface = “serial_b”;
discontinuous_clk = “no”;
dpcm_enable = “false”;
cil_settletime = “0”;

                    active_w = "1920";
                    active_h = "1080";
                    pixel_t = "bayer_bggr";
                    readout_orientation = "90";
                    line_length = "2688";
                    inherent_gain = "1";
                    mclk_multiplier = "6.67";
                    pix_clk_hz = "160000000";

                    min_gain_val = "1.0";
                    max_gain_val = "16";
                    min_hdr_ratio = "1";
                    max_hdr_ratio = "64";
                    min_framerate = "1.816577";
                    max_framerate = "30";
                    min_exp_time = "34";
                    max_exp_time = "550385";
            };

    };

    tegra-camera-platform {
            compatible = "nvidia, tegra-camera-platform";
                    module0 {
                            badge = "e3326_front_P5V27C";
                            position = "rear";
                            orientation = "1";
                            drivernode0 {
                                    /* Declare PCL support driver (classically known as guid)  */
                                    pcl_id = "v4l2_soc_sensor";
                                    /* Declare the device-tree hierarchy to driver instance */
                                    proc-device-tree = "/proc/device-tree/ov5600_b@36";
                            };
                            drivernode1 {
                                    /* Declare PCL support driver (classically known as guid)  */
                                    pcl_id = "v4l2_focuser_stub";
                            };
                    };
            };
    };

};

/* camera control gpio definitions */

/ {
ov5600_b@36 {
};

    gpio: gpio@6000d000 {
            camera-control {
                    gpio-output-low = <
                            CAM0_RST_L
                            CAM0_PWDN
                            >;
            };
    };

};

========================================================================================================

Kernel log as attach. Point is using yavta:

[ 45.189465] [ov5600] poweron

[ 45.189485] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189495] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189609] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189617] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.195367] [vi2] capture_frame@csi:2

[ 45.195375] [vi2] capture_setup@csi:2

[ 45.195389] [vi2] setup-format@csi:2

[ 45.195477] [ov5600] s_stream mode:2

[ 45.195484] [ov5600] s_stream setting

[ 45.195492] [ov5600] set_gain

[ 45.195499] [ov5600] set_group_hold en:0 sw:0

[ 45.195506] [ov5600] set_frame_length

[ 45.195510] [ov5600] set_group_hold en:0 sw:0

[ 45.195516] [ov5600] set_coarse_time

[ 45.195521] [ov5600] set_group_hold en:0 sw:0

[ 45.195526] [ov5600] set_coarse_time_short

[ 45.195531] [ov5600] set_group_hold en:0 sw:0

[i][b][ 47.188443] vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11
[ 47.188753] [vi2] capture_done@csi:2

[ 47.194472] vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000000
[ 47.200154] vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000000
[ 47.205498] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 47.211467] vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000
[ 49.188735] vi vi: MW_ACK_DONE syncpoint time out![/b][/i]

[ 49.236070] [ov5600] stop stream

[ 49.238166] [ov5600] poweroff

===============================================================================

dmesg log:

[ 32.786432] vi vi: initialized
[ 32.786583] soc-camera-pdrv soc-camera-pdrv.0: Probing soc-camera-pdrv.0
[ 32.794186] [OV5600] probing v4l2 sensor@36
[ 32.794231] [max9288] soc_camera_i2c_to_desc

[ 32.794238] [max9288] csiport:0

[ 32.794348] [max9288] ov5600_parse_dt

[ 32.794353] [ov5600] parse_dt

[ 32.794363] [ov5600] power-get

[ 32.794417] [ov5600] power-get/off

[ 32.794424] [max9288] create_debugfs

[ 32.794444] [max9288] v4l2_i2c_subdev_init

[ 32.794452] [max9288] ov5600_ctrls_init

[ 32.794456] [ov5600] ctrls_init

[ 32.794491] [ov5600] s_ctrl

[ 32.794495] [ov5600] s_ctrl

[ 32.794500] [ov5600] s_ctrl

[ 32.794504] [ov5600] s_ctrl

[ 32.794508] [ov5600] s_ctrl

[ 32.794512] [ov5600] s_ctrl

[ 32.794517] [ov5600] s_ctrl

[ 32.794521] [ov5600] otp_setup

[ 32.794550] [ov5600] poweron

[ 32.794636] [ov5600] poweroff

[ 32.794677] [ov5600] poweron

[ 32.794684] [ov5600] poweroff

[ 32.794706] [ov5600] eeprom_init

[ 32.795536] soc-camera-pdrv soc-camera-pdrv.1: Probing soc-camera-pdrv.1
[ 32.799380] [OV5600] probing v4l2 sensor@36
[ 32.799416] [max9288] soc_camera_i2c_to_desc

[ 32.799422] [max9288] csiport:1

[ 32.799514] [max9288] ov5600_parse_dt

[ 32.799518] [ov5600] parse_dt

[ 32.799526] [ov5600] power-get

[ 32.799586] [ov5600] power-get/off

[ 32.799590] [max9288] create_debugfs

[ 32.799606] [max9288] v4l2_i2c_subdev_init

[ 32.799612] [max9288] ov5600_ctrls_init

[ 32.799616] [ov5600] ctrls_init

[ 32.799649] [ov5600] s_ctrl

[ 32.799653] [ov5600] s_ctrl

[ 32.799657] [ov5600] s_ctrl

[ 32.799661] [ov5600] s_ctrl

[ 32.799664] [ov5600] s_ctrl

[ 32.799668] [ov5600] s_ctrl

[ 32.799672] [ov5600] s_ctrl

[ 32.799676] [ov5600] otp_setup

[ 32.799700] [ov5600] poweron

[ 32.799769] [ov5600] poweroff

[ 32.799805] [ov5600] poweron

[ 32.799810] [ov5600] poweroff

[ 32.799830] [ov5600] eeprom_init

[ 32.800465] soc-camera-pdrv soc-camera-pdrv.2: Probing soc-camera-pdrv.2
[ 32.803690] [OV5600] probing v4l2 sensor@36
[ 32.803725] [max9288] soc_camera_i2c_to_desc

[ 32.803730] [max9288] csiport:2

[ 32.803825] [max9288] ov5600_parse_dt

[ 32.803829] [ov5600] parse_dt

[ 32.803838] [ov5600] power-get

[ 32.803898] [ov5600] power-get/off

[ 32.803902] [max9288] create_debugfs

[ 32.803917] [max9288] v4l2_i2c_subdev_init

[ 32.803923] [max9288] ov5600_ctrls_init

[ 32.803927] [ov5600] ctrls_init

[ 32.803960] [ov5600] s_ctrl

[ 32.803965] [ov5600] s_ctrl

[ 32.803969] [ov5600] s_ctrl

[ 32.803973] [ov5600] s_ctrl

[ 32.803976] [ov5600] s_ctrl

[ 32.803980] [ov5600] s_ctrl

[ 32.803984] [ov5600] s_ctrl

[ 32.803988] [ov5600] otp_setup

[ 32.804014] [ov5600] poweron

[ 32.804085] [ov5600] poweroff

[ 32.804122] [ov5600] poweron

[ 32.804127] [ov5600] poweroff

[ 32.804147] [ov5600] eeprom_init

[ 32.804751] soc-camera-pdrv soc-camera-pdrv.3: Probing soc-camera-pdrv.3
[ 32.808078] [OV5600] probing v4l2 sensor@36
[ 32.808113] [max9288] soc_camera_i2c_to_desc

[ 32.808119] [max9288] csiport:3

[ 32.808210] [max9288] ov5600_parse_dt

[ 32.808215] [ov5600] parse_dt

[ 32.808223] [ov5600] power-get

[ 32.808283] [ov5600] power-get/off

[ 32.808287] [max9288] create_debugfs

[ 32.808314] [max9288] v4l2_i2c_subdev_init

[ 32.808320] [max9288] ov5600_ctrls_init

[ 32.808324] [ov5600] ctrls_init

[ 32.808352] [ov5600] s_ctrl

[ 32.808356] [ov5600] s_ctrl

[ 32.808360] [ov5600] s_ctrl

[ 32.808364] [ov5600] s_ctrl

[ 32.808367] [ov5600] s_ctrl

[ 32.808371] [ov5600] s_ctrl

[ 32.808375] [ov5600] s_ctrl

[ 32.808379] [ov5600] otp_setup

[ 32.808405] [ov5600] poweron

[ 32.808476] [ov5600] poweroff

[ 32.808515] [ov5600] poweron

[ 32.808521] [ov5600] poweroff

[ 32.808542] [ov5600] eeprom_init

[ 32.809260] soc-camera-pdrv soc-camera-pdrv.4: Probing soc-camera-pdrv.4
[ 32.812716] [OV5600] probing v4l2 sensor@36
[ 32.812755] [max9288] soc_camera_i2c_to_desc

[ 32.812761] [max9288] csiport:4

[ 32.812857] [max9288] ov5600_parse_dt

[ 32.812862] [ov5600] parse_dt

[ 32.812871] [ov5600] power-get

[ 32.812933] [ov5600] power-get/off

[ 32.812937] [max9288] create_debugfs

[ 32.812953] [max9288] v4l2_i2c_subdev_init

[ 32.812960] [max9288] ov5600_ctrls_init

[ 32.812964] [ov5600] ctrls_init

[ 32.812992] [ov5600] s_ctrl

[ 32.812996] [ov5600] s_ctrl

[ 32.813000] [ov5600] s_ctrl

[ 32.813004] [ov5600] s_ctrl

[ 32.813007] [ov5600] s_ctrl

[ 32.813011] [ov5600] s_ctrl

[ 32.813015] [ov5600] s_ctrl

[ 32.813018] [ov5600] otp_setup

[ 32.813046] [ov5600] poweron

[ 32.813118] [ov5600] poweroff

[ 32.813158] [ov5600] poweron

[ 32.813163] [ov5600] poweroff

[ 32.813184] [ov5600] eeprom_init

[ 32.813911] soc-camera-pdrv soc-camera-pdrv.5: Probing soc-camera-pdrv.5
[ 32.817538] [OV5600] probing v4l2 sensor@36
[ 32.817578] [max9288] soc_camera_i2c_to_desc

[ 32.817584] [max9288] csiport:5

[ 32.817686] [max9288] ov5600_parse_dt

[ 32.817691] [ov5600] parse_dt

[ 32.817698] [ov5600] power-get

[ 32.817759] [ov5600] power-get/off

[ 32.817763] [max9288] create_debugfs

[ 32.817779] [max9288] v4l2_i2c_subdev_init

[ 32.817785] [max9288] ov5600_ctrls_init

[ 32.817789] [ov5600] ctrls_init

[ 32.817819] [ov5600] s_ctrl

[ 32.817823] [ov5600] s_ctrl

[ 32.817827] [ov5600] s_ctrl

[ 32.817831] [ov5600] s_ctrl

[ 32.817834] [ov5600] s_ctrl

[ 32.817838] [ov5600] s_ctrl

[ 32.817841] [ov5600] s_ctrl

[ 32.817845] [ov5600] otp_setup

[ 32.817870] [ov5600] poweron

[ 32.817942] [ov5600] poweroff

[ 32.817989] [ov5600] poweron

[ 32.817994] [ov5600] poweroff

[ 32.818035] [ov5600] eeprom_init

[ 32.818790] vi vi: Tegra camera driver loaded.
[ 32.821752] [ov5600] poweron

[ 32.821768] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821775] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821848] [ov5600] poweron

[ 32.821860] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821866] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821930] [ov5600] poweron

[ 32.821940] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821946] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.821957] [ov5600] poweroff

[ 32.821998] [ov5600] poweroff

[ 32.822036] [ov5600] poweroff

[ 32.823147] [ov5600] poweron

[ 32.823159] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.823165] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.823240] [ov5600] poweron

[ 32.823251] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.823257] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.823310] [ov5600] poweroff

[ 32.823345] [ov5600] poweroff

[ 32.824580] [ov5600] poweron

[ 32.824593] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.824600] [cam_common] search-mode:2 1920x1080 hdr:0

[ 32.824658] [ov5600] poweroff

[ 45.189465] [ov5600] poweron

[ 45.189485] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189495] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189609] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.189617] [cam_common] search-mode:2 1920x1080 hdr:0

[ 45.195367] [vi2] capture_frame@csi:2

[ 45.195375] [vi2] capture_setup@csi:2

[ 45.195389] [vi2] setup-format@csi:2

[ 45.195477] [ov5600] s_stream mode:2

[ 45.195484] [ov5600] s_stream setting

[ 45.195492] [ov5600] set_gain

[ 45.195499] [ov5600] set_group_hold en:0 sw:0

[ 45.195506] [ov5600] set_frame_length

[ 45.195510] [ov5600] set_group_hold en:0 sw:0

[ 45.195516] [ov5600] set_coarse_time

[ 45.195521] [ov5600] set_group_hold en:0 sw:0

[ 45.195526] [ov5600] set_coarse_time_short

[ 45.195531] [ov5600] set_group_hold en:0 sw:0

[ 47.188443] vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11
[ 47.188753] [vi2] capture_done@csi:2

[ 47.194472] vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000000
[ 47.200154] vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000000
[ 47.205498] vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
[ 47.211467] vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000
[ 49.188735] vi vi: MW_ACK_DONE syncpoint time out!
[ 49.236070] [ov5600] stop stream

[ 49.238166] [ov5600] poweroff

===================================================================================================

"the input video data has processed by our hardware ISP
=> Does this mean ov5600 outputs raw image but processed by your hardware ISP (not Tegra ISP) or it outputs YUV format? Could you briefly describe high-level data path?

From log data,

  • could you probe MIPI signal and check if the timing matches MIPI spec. Seems Tegra didn’t receive data from sensor side.
  • For YUV sensor, you could reference …/drivers/media/i2c/soc_camera/ov5640.c driver code

Hi Chi-Jen

Thanks for your fast feedback. Our high-level data path is that ov5600 CMOS sensor output captured video raw data to our hardware ISP. Then, the hardware ISP will output YUV422 signal to TX1 after processing video raw data. If you have any questions or need any information, please feel free to tell me.

  1. Make sure the MIPI data single is correct as MIPI spec.
  2. Could you migrate to r24.2 to use the V4L2 (media control base) instead of soc_camera to bring up. Since 23.2 not maintain any more.
  3. For the TX1 the pixel should be uyvy, vyuy, yuyv or yvyu should not be bayer. (pixel_t = “bayer_bggr”)

Hello Shane,

Thanks for your hints. We will try to modify and test this issue by according your suggestion. If you have any questions or need other additional information, please feel free to tell me.

Which ISP chip are you using? Does it generates the correct clock signals? Do you know if the clock is continuous or non continuous? I suppose that you are trying to capture 1080p30? We have been able to capture yuv from other chip [1] so the tegra should be able to capture the data.

What are you using to test the capture? Yavta or v4l2src?

[1] https://developer.ridgerun.com/wiki/index.php?title=Toshiba_TC358743_Linux_driver_for_Tegra_X1

Hello David,

We use Sony 5700 ISP. And it can output 1920x1080 YCbCr signal with pixel clock 74.25MHz. Then, it is passed through MAX9275 serializer and MAX9288 deserializer to TX1. The final output MIPI CSI signal from MAX9288 to TX1 is YUV422 8bit 1080p 30 frame signal.. The output clock is continuous 154MHz. Finally, we use Yavta to test capture. If you have any other questions, please feel free to tell me.

I was trying to find the datasheet for ov5600 and I was not able to find it. I wanted to know details about lanes and clock details from the camera, ISP and serDes.

Anyway, so it sound like you have the following setup:

ov5600 --> (MIPI/bayer)–>Sony 5700 ISP -->(Parallel/YUV422 8 bits)–>MAX9275—>(serial)–>MAX9288—>(MIPI)—>TegraX1

Several things come to my mind since it seems your tegra is not receiving data:

a) Do you have the datasheet of the 5700? It would be good to check if the chip is detecting the correct resolution coming from your camera sensor. This would give an idea if your driver is configuring the camera properly. I think the maximum supported is 3Mp [1].

b) Is there some way to enable a test pattern in the Sony 5700 ISP? It would help you to discard problems with the camera.

c) Assuming that the ISP is receiving the correct resolution and frame. Could you check the MAX9275 and MAX9288 if they are detecting the correct resolution on the inputs? Normally these chips have an i2c register that indicates the resolution detected or at least if it locks on the input signal. That is part of the process as you can see in figure 38 in the datasheet [2][3].

d) Check Table 1 in page 62[2], maybe one of those registers rings a bell for you. 1080p is a lot of bits per second, check that you are using the correct SRNG or try using a lower resolution so you are sure that you are not being affected by the bandwidth.

e) Please double check that the configuration of MAX9288 corresponds to what you put in the config file of the tegra:

TEGRA_CAMERA_PORT_CSI_B
.lanes = 2,
.continuous_clk = 0,

f) Is there some way to connect your camera sensor to the tegra directly (bypassing ISP and serdes)? We could try capturing bayer directly to be sure that your sensor is putting data in the outputs.

g) Not sure why TI recommends other pair of serdes for this ISP [4]. Those seems to be for 1080p. It calls my attention that MAX chips say 1920x720.

I hope this helps, you can always contact us if you need more help.

-David

[1] http://www.sunnic.com.tw/english/05_news/02_detail.php?NID=104
[2] https://datasheets.maximintegrated.com/en/ds/MAX9275-MAX9279.pdf
[3] https://datasheets.maximintegrated.com/en/ds/MAX9288-MAX9290.pdf
[4] https://e2e.ti.com/support/interface/high_speed_interface/f/138/t/500851

Another way is program the Sony ISP to output color partner to make sure the way to the TX1 first.

Hello David and Shane,

Thanks for your great help firstly. Actually, our CMOS senor is Sony IMX290, not OV5600. Before inputting MIPI signal to TX1, we have did another experiment. We have connected camera path like as “Sony IMX290 --> (MIPI/bayer)–>Sony 5700 ISP -->(Parallel/YUV422 8 bits)–>MAX9275(serializer)” to MAX9276 (parallel video data outputting deserializer) --> IP CAM SOC. And, we could saw the clear and correct 1080p 30f live view and playback display from camera. So, we thought that the camera path should be ok. Furthermore, we also checked the MAX9288 linking status like as the listed item c) from David when camera path was connected to MAX9288. Then, the linking status of MAX9275 and MAX9288 were all linking locked. Therefore, we also confirm that the camera path and MAX9288 should be connected correctly. Now, we will try to check the item e) from David. Then, we will focus on the synchronization of clock and data signal between MAX9288 and TX1.

Hello Chi-Jen and Shane,

By the way, we have modified vi2.c and set the MIPI CSI format to YUV422. Furthermore, we have also set the configure setup like as SRGB10, YUYV, RGB32 for Yavta. And the output setup of MAX9288 was (SRGGB10:RAW10, YUV422:YUV422 8bit, RGB32:RGB888). Then, the TX1 MIPI would be also set for (SRGB10:SRGGB10_1x10, YUV422:UYVY8_2x8, RGB32:RGB888). But, we also got the same error messages like as my attached file. Can you kindly give us some advices further ? And, can you also provide one available and suitable YUV422 8bits(UYVY) clock timing of syncing with TX1 MIPI interface for our reference ?

Thank you very much.

CSI2_log file1021.txt (61.3 KB)

Hello Chi-Jen and Shane,

Sorry. I attached the log file with error messages again.

CSI2_log file1021.txt (61.3 KB)

Hello Chi-Jen and Shane,

I list the difference between original error messages and after modification. Hoping the summarization can speed up your analysis.

Original error messages After modification and re-setup

vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11 vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11
[vi2] capture_done@csi:2 [vi2] capture_done@csi:2
vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000000 vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000010
vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000000 vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000041
vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000 vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000 vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000
vi vi: MW_ACK_DONE syncpoint time out! vi vi: MW_ACK_DONE syncpoint time out!

Hello Chi-Jen and Shane,

Sorry. Because the word format is disorder in previous reply, I resent it again.

Original error messages------------------------------------After modification and re-setup

vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11---------vi vi: CSI 2 syncpt timeout, syncpt = 7, err = -11
[vi2] capture_done@csi:2-----------------------------------[vi2] capture_done@csi:2
vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000000----------vi vi: TEGRA_CSI_CSI_CIL_STATUS 0x00000010
vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000000---------vi vi: TEGRA_CSI_CSI_CILX_STATUS 0x00000041
vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000------------vi vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000----------------vi vi: TEGRA_VI_CSI_ERROR_STATUS 0x00000000
vi vi: MW_ACK_DONE syncpoint time out!---------------------vi vi: MW_ACK_DONE syncpoint time out!

The error means below description. It should be the MIPI single have problem.

Start of Transmission Single Bit Error. Set when CIL-A detects a single bit error in
one of the packet’s Start of Transmission bytes. The packet will be sent to the CSI-A for processing

Hello Chi-Jen,

Sorry to bother you. We have measured the MIPI CSI data signal waveform from MAX9288 and OV5693. And, I attached these waveform for your reference. Sorry again. Because it was not easy to measure the differential signals and clock signal on our PCBA board at the same time, we only measured the single probe signal data. And, we will try to measure more clearer waveform for your analysis later. If you have any questions or need any information, please feel free to tell me.

MAX9288CSI_Data_out1.png


Hi James

  1. Why does the CSI_D0 only output two package?
  2. For the CSI_D0 waveform, the common voltage of HS mode is around 400~500mV. It looks like the signals is unterminated, since the HS common voltage should be 200~300mV.
  3. Per #2, please provide the waveforms for both of CSI_D0_P and CSI_D0_N at the one picture to confirm.
  4. Please measure the timing the THS_Prepare, THS_Zero to make sure those are within sepc.

updated the new measured signal waveform from MAX9275 and MAX9288 for your reference. We confirmed that the related input and output signal from MAX9275 to MAX9288. Please help to review them. If you have any questions, please feel free to tell me.

CH2: Blue color (MAX9288 output VSYNC)
CH3: Red color (MAX9275 input HSYNC)
CH4: Green color (MAX9288 output CSI_D0+)

Hello,

I



James
Couldyou provide the #3,#4 in early comment.
And please "Zoom in” the waveforms in RED cycles, it seems didn’t meet the LP11 entry/exit timing requirement.

Hello Everyone,

Thanks for your great support. Our TX1 EVK can capture correct image via yavta now. Furthermore, we will start to confirm and test the encoding video function via gstreamer. If we have any update, I will put it for your reference.