I’ve been reading through the forum and it is just not clear to me what I need to do to the dts to enable I2S0 so it shows up in aplay -l
I’ve used this chip with other ARM cores, so I am familiar with programming it. The codec works as master and is using AUD_DIN, AUD_CLK and AUD_FS on edge pins 195, 199 and 197. Reset is set to pin 181. For control, SPI is used, which I am using on 91,93,89 and 97 (which is SPI0).
I see the dev board is using I2S4. I tried to go through the DTB from the jetsonIO to see if I could figure it, but it was definitely not clear to me what to change to map things over.
Can anyone give me some clues on this?