How to define the PIN number for GPIO that is not in the 40PIN?

For GP08_SPI2_MOSI, it could be found through Column-E of the pinmux spreadsheet as following:


It seems the latest pinmux spreadsheet v1.1 does not allow to check the hidden cells.
Do you have previous version pinmux for Orin Nano/NX?

0x0c302028 = 0x0c302000(PADCTL_A14) + 0x00000028(Offset)
Please refer to the following parts in TRM.


=> It shows the PADCTL offset for SPI2_MOSI is 0x28

image
=> It shows PADCTL_A14 is from group AO

image
=> It shows base of PADCTL_A14 is 0x0c302000

This is not available, can you help me provide one? Thank you.

I’ve sent you the pinmux spreadsheet through message.
Please refer to Column-E for SOC Ball Name.

As you are using BCM mode to control GPIO, it is not necessary to know the exact SOC Ball Name for each pins and you can just configure them with any string.

teacher:
I would like to ask the following question again:

1.How was “PADCTL_S14” found? If it’s GPO05, how can I confirm “PADCTL_S14”?

0x0c302028 = 0x0c302000(PADCTL_A14) + 0x0000028(偏移)

2. How is “PADCTLA_AO_SP2-MOSI-0” confirmed?

3.How was “14” found? Found it in that file?

line  14:     "PCC.02"       unused  output  active-high

Teacher, am I doing this right?

$sudo apt update
$sudo apt install gpiod
$gpioinfo

Output the following list:

It is PADCTL_A14 rather than PADCTL_S14.

Could you check the following image I shared above?

Please check the pinmux spreadsheet to know it is SPI2 MOSI and search it in TRM.

I have also provided the required information as following:

Please check all contents I listed in How to define the PIN number for GPIO that is not in the 40PIN? - #20 by KevinFFF and How to define the PIN number for GPIO that is not in the 40PIN? - #27 by KevinFFF again and you should be able to create the line for another pin.

Teacher, I noticed your reply, but it was a bit brief, which made me not entirely sure.
Can you judge if my approach is the same as yours?

line  14:     "PCC.02"       unused  output  active-high
$sudo apt update
$sudo apt install gpiod
$gpioinfo

Yes, 14 is derived from line 14 reported by gpioinfo command.

The following statement has clearly mentioned about this.

Teacher, some PINs cannot find their numbers in PINMUX. For example, how to set PCIE0_CLK-P?

If they cannot be configured as GPIO(not PORT and PIN number for that pin in pinmux spreadsheet.), then they can not be used as GPIO.
Please note that jetson.gpio controls the GPIO based on gpiod.

teacher:
I followed your method and found two results, but I’m not sure which one is.
For example, the search results for SPI2-MOSI in TRM are as follows:

I feel like I didn’t understand. Can you recommend some files for me?

Please ignore the register with name including CFG2TMC string.

teacher:
I don’t quite understand the meaning of this sentence. Are you asking me to ignore it
That part? For example, is it the blue part below?

图片

Please ignore PADCTL_AO_CFG2TMC_SPI2_MOSI_0 this register, which is used for the pull strength.

Just refer to the offset(0x28) of this PADCTL register. (i.e. PADCTL_AO_SPI2_MOSI_0)
=> 0x0c302028 = 0x0c302000(PADCTL_A14) + 0x00000028(Offset)

Okay, thank you, teacher. Let me fill in ‘GPO08’ again using this method.

Teacher, here are three, I don’t know which search to use in TRM.

Please search SOC_GPIO29 for this PIN in TRM.

Why choose “SOC_GPIO29” search instead of other options?

Because: 0x02430000+0x50=0x02430050,So the number of GPO08 is 0x02430050.

Teacher, is the result correct?

Please refer to Column-D for its “Verilog Ball Name”, or you can simply check the option of unused_SOC_GPIO29.

PQ.02 belongs to tegra234-gpio controller so that please specify tegra234-gpio instead of tegra234-gpio-aon.
You can run sudo gpiodetect and sudo gpioinfo to check and you will find PQ.02 is under gpiochip0 as following:

$ sudo gpioinfo|grep -E "gpiochip|PQ.02"
gpiochip0 - 164 lines:
        line 102:      "PQ.02"       unused   input  active-high
gpiochip1 - 32 lines:

$ sudo gpiodetect
gpiochip0 [tegra234-gpio] (164 lines)
gpiochip1 [tegra234-gpio-aon] (32 lines)