Jetson Orin Nano GPIO

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin Nano
1

I noticed a lot of customers share the same issue as mine? For instance:

My simple code:

import Jetson.GPIO as GPIO
import time

# Pin Definitions
led_pin = 18  # GPIO pin where the LED is connected

# GPIO Setup
GPIO.setmode(GPIO.BOARD)  # Use board pin numbering
GPIO.setup(led_pin, GPIO.OUT, initial=GPIO.LOW)

try:
    while True:
        # Turn LED on
        GPIO.output(led_pin, GPIO.HIGH)
        time.sleep(1)  # Keep LED on for 1 second

        # Turn LED off
        GPIO.output(led_pin, GPIO.LOW)
        time.sleep(1)  # Keep LED off for 1 second

except KeyboardInterrupt:
    print("Program stopped by user")

finally:
    # Cleanup GPIO settings before exiting
    GPIO.cleanup()

does not blink at all.

And the result of sudo cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups on my Jetson Orin Nano is pasted at https://pastebin.com/MFgt79vM .

Can anybody please help to take a look??

Thank you

3

Please directly put your result here. We are not allowed to access pastebin.

4 
➜  sudo cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups
Pin config settings per pin group
Format: group (name): configs
0 (soc_gpio08_pb0): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
1 (soc_gpio36_pm5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
2 (soc_gpio53_pm6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
3 (soc_gpio55_pm4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
4 (soc_gpio38_pm7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
5 (soc_gpio39_pn1): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
6 (soc_gpio40_pn2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
7 (dp_aux_ch0_hpd_pm0): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=dp
8 (dp_aux_ch1_hpd_pm1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
9 (dp_aux_ch2_hpd_pm2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
10 (dp_aux_ch3_hpd_pm3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
11 (dp_aux_ch1_p_pn3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
12 (dp_aux_ch1_n_pn4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
13 (dp_aux_ch2_p_pn5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
14 (dp_aux_ch2_n_pn6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
15 (dp_aux_ch3_p_pn7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
16 (dp_aux_ch3_n_pn0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
17 (eqos_td3_pe4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
18 (eqos_td2_pe3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
19 (eqos_td1_pe2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
20 (eqos_td0_pe1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
21 (eqos_rd3_pf1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
22 (eqos_rd2_pf0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
23 (eqos_rd1_pe7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
24 (eqos_sma_mdio_pf4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
25 (eqos_rd0_pe6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
26 (eqos_sma_mdc_pf5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
27 (eqos_comp): 
	tristate=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	drive-type=1
	function=eqos
28 (eqos_txc_pe0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
29 (eqos_rxc_pf3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
30 (eqos_tx_ctl_pe5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
31 (eqos_rx_ctl_pf2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
32 (pex_l2_clkreq_n_pk4): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
33 (pex_wake_n_pl2): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
34 (pex_l1_clkreq_n_pk2): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe1
35 (pex_l1_rst_n_pk3): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe1
36 (pex_l0_clkreq_n_pk0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
37 (pex_l0_rst_n_pk1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
38 (pex_l2_rst_n_pk5): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
39 (pex_l3_clkreq_n_pk6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
40 (pex_l3_rst_n_pk7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
41 (pex_l4_clkreq_n_pl0): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe4
42 (pex_l4_rst_n_pl1): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe4
43 (soc_gpio34_pl3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
44 (pex_l5_clkreq_n_paf0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
45 (pex_l5_rst_n_paf1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
46 (pex_l6_clkreq_n_paf2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
47 (pex_l6_rst_n_paf3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
48 (pex_l10_clkreq_n_pag6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
49 (pex_l10_rst_n_pag7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
50 (pex_l7_clkreq_n_pag0): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe7
51 (pex_l7_rst_n_pag1): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe7
52 (pex_l8_clkreq_n_pag2): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe8
53 (pex_l8_rst_n_pag3): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe8
54 (pex_l9_clkreq_n_pag4): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe9
55 (pex_l9_rst_n_pag5): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=pe9
56 (qspi0_io3_pc5): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
57 (qspi0_io2_pc4): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
58 (qspi0_io1_pc3): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
59 (qspi0_io0_pc2): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
60 (qspi0_sck_pc0): 
	pull=1
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
61 (qspi0_cs_n_pc1): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=qspi0
62 (qspi1_io3_pd3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
63 (qspi1_io2_pd2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
64 (qspi1_io1_pd1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
65 (qspi1_io0_pd0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
66 (qspi1_sck_pc6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
67 (qspi1_cs_n_pc7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	drive-type=1
	gpio-mode=1
	function=rsvd1
68 (qspi_comp): 
	tristate=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	drive-type=1
	function=qspi
69 (sdmmc1_clk_pj0): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
70 (sdmmc1_cmd_pj1): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
71 (sdmmc1_comp): 
	tristate=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	drive-type=0
	function=sdmmc1
72 (sdmmc1_dat3_pj5): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
73 (sdmmc1_dat2_pj4): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
74 (sdmmc1_dat1_pj3): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
75 (sdmmc1_dat0_pj2): 
	pull=2
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=1
	gpio-mode=1
	function=sdmmc1
76 (ufs0_rst_n_pae1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=10
	pull-up-strength=10
	drive-type=1
	gpio-mode=1
	function=rsvd1
77 (ufs0_ref_clk_pae0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=10
	pull-up-strength=10
	drive-type=1
	gpio-mode=1
	function=rsvd1
78 (spi3_miso_py1): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
79 (spi1_cs0_pz6): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
80 (spi3_cs0_py3): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
81 (spi1_miso_pz4): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
82 (spi3_cs1_py4): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
83 (spi1_sck_pz3): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
84 (spi3_sck_py0): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
85 (spi1_cs1_pz7): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
86 (spi1_mosi_pz5): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
87 (spi3_mosi_py2): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
88 (uart2_tx_px4): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uartb
89 (uart2_rx_px5): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uartb
90 (uart2_rts_px6): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uartb
91 (uart2_cts_px7): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uartb
92 (uart5_tx_py5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
93 (uart5_rx_py6): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
94 (uart5_rts_py7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
95 (uart5_cts_pz0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
96 (gpu_pwr_req_px0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
97 (gp_pwm3_px3): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=gp
98 (gp_pwm2_px2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
99 (cv_pwr_req_px1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
100 (usb_vbus_en0_pz1): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
101 (usb_vbus_en1_pz2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
102 (extperiph2_clk_pp1): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=extperiph2
103 (extperiph1_clk_pp0): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=extperiph1
104 (cam_i2c_sda_pp3): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=15
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c3
105 (cam_i2c_scl_pp2): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=15
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c3
106 (soc_gpio23_pp4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=vi0
107 (soc_gpio24_pp5): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=soc
108 (soc_gpio25_pp6): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=vi0
109 (pwr_i2c_scl_pp7): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c5
110 (pwr_i2c_sda_pq0): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c5
111 (soc_gpio28_pq1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
112 (soc_gpio29_pq2): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=nv
113 (soc_gpio30_pq3): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
114 (soc_gpio31_pq4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
115 (soc_gpio32_pq5): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
116 (soc_gpio33_pq6): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
117 (soc_gpio35_pq7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
118 (soc_gpio37_pr0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=gp
119 (soc_gpio56_pr1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
120 (uart1_cts_pr5): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
121 (uart1_rts_pr4): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
122 (uart1_rx_pr3): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uarta
123 (uart1_tx_pr2): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=uarta
124 (cpu_pwr_req_pi5): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
125 (uart4_cts_ph6): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
126 (uart4_rts_ph5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd2
127 (uart4_rx_ph4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
128 (uart4_tx_ph3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd2
129 (gen1_i2c_scl_pi3): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c1
130 (gen1_i2c_sda_pi4): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=31
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=i2c1
131 (soc_gpio20_pg7): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
132 (soc_gpio21_ph0): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
133 (soc_gpio22_ph1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
134 (soc_gpio13_pg0): 
	pull=0
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
135 (soc_gpio14_pg1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
136 (soc_gpio15_pg2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd0
137 (soc_gpio16_pg3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
138 (soc_gpio17_pg4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
139 (soc_gpio18_pg5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
140 (soc_gpio19_pg6): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
141 (soc_gpio41_ph7): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd2
142 (soc_gpio42_pi0): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=0
	function=rsvd2
143 (soc_gpio43_pi1): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=0
	function=rsvd2
144 (soc_gpio44_pi2): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=0
	function=rsvd2
145 (soc_gpio06_ph2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
146 (soc_gpio07_pi6): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=gp
147 (dap4_sclk_pa4): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=i2s4
148 (dap4_dout_pa5): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=i2s4
149 (dap4_din_pa6): 
	pull=1
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=i2s4
150 (dap4_fs_pa7): 
	pull=0
	tristate=0
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=i2s4
151 (dap6_sclk_pa0): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=0
	function=rsvd1
152 (dap6_dout_pa1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
153 (dap6_din_pa2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
154 (dap6_fs_pa3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd1
155 (soc_gpio45_pad0): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd0
156 (soc_gpio46_pad1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd0
157 (soc_gpio47_pad2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd0
158 (soc_gpio48_pad3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd0
159 (soc_gpio57_pac4): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
160 (soc_gpio58_pac5): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
161 (soc_gpio59_pac6): 
	pull=2
	tristate=1
	enable-input=1
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=31
	pull-up-strength=31
	drive-type=0
	gpio-mode=1
	function=rsvd2
162 (soc_gpio60_pac7): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=0
	io-reset=0
	rcv-sel=0
	io-hv=0
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd0
163 (spi5_cs0_pac3): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd3
164 (spi5_miso_pac1): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd3
165 (spi5_mosi_pac2): 
	pull=1
	tristate=1
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=0
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd3
166 (spi5_sck_pac0): 
	pull=0
	tristate=0
	enable-input=0
	open-drain=1
	io-reset=1
	rcv-sel=1
	io-hv=1
	schmitt=1
	pull-down-strength=0
	pull-up-strength=0
	drive-type=0
	gpio-mode=1
	function=rsvd3
5

Just to make sure.

What is “18” gpio in your code? Is that number #18 for 40 pin header?

image

1 Like
6

Are you asking if GPIO.setmode(GPIO.BOARD) or GPIO.setmode(GPIO.BCM) ?

I actually already tried both. Neither is working …

7

BTW, does gpio module need to be loaded? I cannot find the gpio module …

➜  ~ ll /dev/gpiochip*

crw-rw---- 1 root gpio 254, 0 Nov 21  2023 /dev/gpiochip0
crw-rw---- 1 root gpio 254, 1 Nov 21  2023 /dev/gpiochip1
➜  ~ lsmod | grep gpio                               

➜  ~
8

No, I don’t care about your code at all. What I want to know is what is the exact pin you are using here.

Just tell me which pin you are using here. That is all I want to know for now.

9

@WayneWWW

I am using pin 18 as https://jetsonhacks.com/nvidia-jetson-orin-nano-gpio-header-pinout/ .

10

Looks like the pinmux setting is not correct. Tristate should be set to 0.

79 (spi1_cs0_pz6):
pull=2
tristate=1
enable-input=1
open-drain=1
io-reset=1
rcv-sel=1
io-hv=1
schmitt=0
pull-down-strength=0
pull-up-strength=0
drive-type=0
gpio-mode=0
function=rsvd1

11

Hi, @WayneWWW

I can see there are multiple occurences of tristate=1. Should I manually change them all to tristate=0 ?

Cheers

12

Just change those pins that you want to use as GPIO…

13

But, how do I know, which pin is it? For example, this one: 79 (spi1_cs0_pz6), which pin is it? is this one pin 18?
Where can I find the map?

14

Yes, that is pin 18.

You could check the pinmux spreadsheet excel file and it has this information.

15 
➜  ~ ll /boot/dtb 

total 244K
-rw-r--r-- 1 root root 244K Oct 21 03:32 kernel_tegra234-p3768-0000+p3767-0003-nv.dtb

in which, there is ONLY:

  pinmux@2430000 {
  	compatible = "nvidia,tegra234-pinmux";
  	reg = <0x00 0x2430000 0x00 0x19100>;
  	status = "okay";
  	phandle = <0x02>;

  	pex_rst_c4_in {
  		phandle = <0x11f>;

  		pex_rst {
  			nvidia,pins = "pex_l4_rst_n_pl1";
  			nvidia,function = "rsvd1";
  			nvidia,pull = <0x00>;
  			nvidia,tristate = <0x01>;
  			nvidia,enable-input = <0x01>;
  			nvidia,lpdr = <0x00>;
  		};
  	};

  	pex_rst_c5_in {
  		phandle = <0x116>;

  		pex_rst {
  			nvidia,pins = "pex_l5_rst_n_paf1";
  			nvidia,function = "rsvd1";
  			nvidia,pull = <0x00>;
  			nvidia,tristate = <0x01>;
  			nvidia,enable-input = <0x01>;
  			nvidia,lpdr = <0x00>;
  		};
  	};

  	pex_rst_c6_in {
  		phandle = <0x117>;

  		pex_rst {
  			nvidia,pins = "pex_l6_rst_n_paf3";
  			nvidia,function = "rsvd1";
  			nvidia,pull = <0x00>;
  			nvidia,tristate = <0x01>;
  			nvidia,enable-input = <0x01>;
  			nvidia,io-high-voltage = <0x01>;
  			nvidia,lpdr = <0x00>;
  		};
  	};

  	pex_rst_c7_in {
  		phandle = <0x11a>;

  		pex_rst {
  			nvidia,pins = "pex_l7_rst_n_pag1";
  			nvidia,function = "rsvd1";
  			nvidia,pull = <0x00>;
  			nvidia,tristate = <0x01>;
  			nvidia,enable-input = <0x01>;
  			nvidia,io-high-voltage = <0x01>;
  			nvidia,lpdr = <0x00>;
  		};
  	};

  	pex_rst_c10_in {
  		phandle = <0x10f>;

  		pex_rst {
  			nvidia,pins = "pex_l10_rst_n_pag7";
  			nvidia,function = "rsvd1";
  			nvidia,pull = <0x00>;
  			nvidia,tristate = <0x01>;
  			nvidia,enable-input = <0x01>;
  			nvidia,io-high-voltage = <0x01>;
  			nvidia,lpdr = <0x00>;
  		};
  	};

  	eqos_rx_disable {
  		phandle = <0x11c>;

  		eqos {
  			nvidia,pins = "eqos_rd0_pe6\0eqos_rd1_pe7\0eqos_rd2_pf0\0eqos_rd3_pf1\0eqos_rx_ctl_pf2";
  			nvidia,enable-input = <0x00>;
  		};
  	};

  	eqos_rx_enable {
  		phandle = <0x11d>;

  		eqos {
  			nvidia,pins = "eqos_rd0_pe6\0eqos_rd1_pe7\0eqos_rd2_pf0\0eqos_rd3_pf1\0eqos_rx_ctl_pf2";
  			nvidia,enable-input = <0x01>;
  		};
  	};
  };

Seriously have NO idea how to proceed with the GPIO enabled for pin 18 ?

16

Check your Linux_for_Tegra/bootloader directory.

Pinmux is not handled in kernel but in MB1. So checking kernel dtb won’t see those information…

After you change the spreadsheet, it will generate some dtsi file and you should put them into Linux_for_Tegra/bootloader to replace old files.

https://docs.nvidia.com/jetson/archives/r36.4/DeveloperGuide/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html?highlight=pinmux#changing-the-pinmux

17

Okay…

  1. On my board
➜  ~ ll /boot/dtb 

total 244K
-rw-r--r-- 1 root root 244K Oct 21 03:32 kernel_tegra234-p3768-0000+p3767-0003-nv.dtb
  1. Extract my downloaded JetPack 6.1, I got NO p3767-0003, but the following p3767 0000, p3767 0001, and p3767 0004 :
➜  bootloader pwd
....../Linux_for_Tegra/bootloader
➜  bootloader ls tegra234-mb1-*-p3767*
tegra234-mb1-bct-gpio-p3767-dp-a03.dtsi                     tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc07-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-as-Nano-rc00-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc08-665mhz.dtsi
tegra234-mb1-bct-gpio-p3767-hdmi-a03.dtsi                   tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc07-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc00-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc09-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0000-rc00-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc08-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc00-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc09-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0000-rc00-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc08-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc01-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc10-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc00-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc09-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc01-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc10-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc00-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc09-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc02-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc11-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc01-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc10-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc02-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc11-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc01-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc10-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc03-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc12-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc02-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc11-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc03-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc12-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc02-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc11-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc04-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc13-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc03-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc12-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc04-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc13-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc03-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc12-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc05-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc14-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc04-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc13-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc05-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc14-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc04-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc13-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc06-204mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc15-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc05-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc14-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc06-665mhz.dtsi          tegra234-mb1-bct-p3767-0001-rc15-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc05-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc14-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc07-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc00-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc06-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc15-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc07-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc00-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc06-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc15-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc08-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc01-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc07-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc00-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc08-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc01-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc07-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc00-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc09-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc02-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc08-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc01-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc09-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc02-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc08-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc01-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc10-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc03-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc09-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc02-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc10-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc03-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc09-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc02-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc11-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc04-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc10-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc03-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc11-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc04-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc10-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc03-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc12-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc05-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc11-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc04-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc12-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc05-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc11-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc04-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc13-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc06-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc12-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc05-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc13-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc06-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc12-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc05-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc14-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc07-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc13-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc06-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc14-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc07-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc13-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc06-665mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc15-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc08-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc14-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc07-204mhz.dtsi  tegra234-mb1-bct-p3767-0000-rc15-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc08-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc14-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc07-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc00-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc09-204mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc15-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc08-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc00-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc09-665mhz.dtsi
tegra234-mb1-bct-p3701-0000-as-p3767-0004-rc15-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc08-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc01-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc10-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc00-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc09-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc01-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc10-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc00-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc09-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc02-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc11-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc01-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc10-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc02-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc11-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc01-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc10-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc03-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc12-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc02-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc11-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc03-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc12-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc02-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc11-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc04-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc13-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc03-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc12-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc04-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc13-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc03-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc12-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc05-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc14-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc04-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc13-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc05-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc14-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc04-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc13-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc06-204mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc15-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc05-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc14-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc06-665mhz.dtsi          tegra234-mb1-bct-p3767-0004-rc15-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc05-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc14-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc07-204mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc06-204mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc15-204mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc07-665mhz.dtsi
tegra234-mb1-bct-p3701-0005-as-p3767-0000-rc06-665mhz.dtsi  tegra234-mb1-bct-p3701-0005-as-p3767-0004-rc15-665mhz.dtsi  tegra234-mb1-bct-p3767-0001-rc08-204mhz.dtsi
➜  bootloader
  1. By grep pinmux:
➜  bootloader rg pinmux
tegra234-mb1-bct-gpio-p3767-dp-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux dp.xlsm Revision: 1.03 */

tegraflash.py
74:            "--pinmux_config":None, "--pmc_config":None, "--pmic_config":None,
106:    '                    [--pinmux_config <file>] [--pmc <file>] [--scr_config <file>]',
156:    '   --pinmux_config : Pinmux BCT configuration',
1293:               "pinmux_config=", "scr_config=", "scr_cold_boot_config=",

tegraflash_internal.py
414:                    '--pinmux_config', '--gpioint_config', '--uphy_config', '--scr_config', \
4402:    if values['--pinmux_config'] is not None:
4403:        command.extend(['--pinmux', values['--pinmux_config']])

tegraflash_impl_t234.py
360:                        '--pinmux_config', '--pmc_config', '--pmic_config',
1650:        if values['--pinmux_config'] is not None:
1651:            command.extend(['--pinmux', values['--pinmux_config']])

tegra234-mb1-bct-gpio-p3767-hdmi-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux hdmi.xlsm Revision: 1.03 */

generic/BCT/tegra234-mb1-bct-padvoltage-p3767-hdmi-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux hdmi.xlsm Revision: 1.03 */

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0002-p3740-0002-b01.dtsi
37:	pinmux@2430000 {
39:		pinctrl-0 = <&pinmux_default>;
41:		pinctrl-2 = <&pinmux_unused_lowpower>;
43:		pinmux_default: common {
1962:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0002-P3711-0000.dtsi
22:	pinmux@2430000 {
24:		pinctrl-0 = <&pinmux_default>;
26:		pinctrl-2 = <&pinmux_unused_lowpower>;
28:		pinmux_default: common {
1780:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux dp.xlsm Revision: 1.03 */
37:	pinmux@2430000 {
39:		pinctrl-0 = <&pinmux_default>;
41:		pinctrl-2 = <&pinmux_unused_lowpower>;
43:		pinmux_default: common {
1007:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3767-hdmi-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux hdmi.xlsm Revision: 1.03 */
37:	pinmux@2430000 {
39:		pinctrl-0 = <&pinmux_default>;
41:		pinctrl-2 = <&pinmux_unused_lowpower>;
43:		pinmux_default: common {
1007:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0000-a04.dtsi
37:	pinmux@2430000 {
39:		pinctrl-0 = <&pinmux_default>;
41:		pinctrl-2 = <&pinmux_unused_lowpower>;
43:		pinmux_default: common {
1700:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0002-p3740-0002.dtsi
37:	pinmux@2430000 {
39:		pinctrl-0 = <&pinmux_default>;
41:		pinctrl-2 = <&pinmux_unused_lowpower>;
43:		pinmux_default: common {
1842:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-padvoltage-p3767-dp-a03.dtsi
1:/*This dtsi file was generated by jetson orin nano&nx pinmux dp.xlsm Revision: 1.03 */

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0000.dtsi
36:	pinmux@2430000 {
38:		pinctrl-0 = <&pinmux_default>;
40:		pinctrl-2 = <&pinmux_unused_lowpower>;
42:		pinmux_default: common {
1719:		pinmux_unused_lowpower: unused_lowpower {

generic/BCT/tegra234-mb1-bct-pinmux-p3701-0008-p3740-0002-c01.dtsi
38:	pinmux@2430000 {
40:		pinctrl-0 = <&pinmux_default>;
42:		pinctrl-2 = <&pinmux_unused_lowpower>;
44:		pinmux_default: common {
1918:		pinmux_unused_lowpower: unused_lowpower {

Among which, there are three Python files, instead of existing .dtsi files:

➜  bootloader rg pinmux         
tegraflash.py
74:            "--pinmux_config":None, "--pmc_config":None, "--pmic_config":None,
106:    '                    [--pinmux_config <file>] [--pmc <file>] [--scr_config <file>]',
156:    '   --pinmux_config : Pinmux BCT configuration',
1293:               "pinmux_config=", "scr_config=", "scr_cold_boot_config=",

tegraflash_internal.py
414:                    '--pinmux_config', '--gpioint_config', '--uphy_config', '--scr_config', \
4402:    if values['--pinmux_config'] is not None:
4403:        command.extend(['--pinmux', values['--pinmux_config']])

tegraflash_impl_t234.py
360:                        '--pinmux_config', '--pmc_config', '--pmic_config',
1650:        if values['--pinmux_config'] is not None:
1651:            command.extend(['--pinmux', values['--pinmux_config']])
  1. Furthermore, I noticed there something specificailly for my board with DP display.
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:/*This dtsi file was generated by jetson orin nano&nx pinmux dp.xlsm Revision: 1.03 */
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:	pinmux@2430000 {
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:		pinctrl-0 = <&pinmux_default>;
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:		pinctrl-2 = <&pinmux_unused_lowpower>;
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:		pinmux_default: common {
generic/BCT/tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi:		pinmux_unused_lowpower: unused_lowpower {

So, which file should I modify? And how???

18

You already pointed it out by yourself.

tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi

Replace above file with the files generated from pinmux spreadsheet.

If you don’t know pinmux spreadsheet can generate files out, then it is another story.

19

Hi, @WayneWWW

yes, you said it… I have NO idea how to genearte that .dtsi file out from pinmux spreadsheet.

  1. I don’t use Windows at all, so that I do not use Office 365.
  2. Got no idea if LibreOffice will do ??
  3. I use WPS much often. The one I’m using is attached (version 11.1.0.11723)
    Screenshot from 2024-11-16 20-34-48
    Screenshot from 2024-11-16 20-34-48742×559 74.2 KB

but I obtianed an error when I click on that Generate DT file :

Screenshot from 2024-11-16 20-34-57
Screenshot from 2024-11-16 20-34-57420×244 16.2 KB

Is there anything we can do by a single command? Most Linux users use .json file or other staff instead of spreadsheet. And this spreadsheet file Jetson_Orin_NX_and_Orin_Nano_series_Pinmux_Config_Template.xlsm is of 2.7M. I believe .json will be of much smaller size.

So, wondering if you can?

  • either help me out on installing require macros for WPS?
  • or directly provide me the generated tegra234-mb1-bct-pinmux-p3767-dp-a03.dtsi, I prefer all those UNUSED pins are GPIOs.

I even came across this DTSI Files from Pinmux Config Spreadsheet Not Controlling GPIOs Correctly on Jetson Orin Nano today. What can I say?? This GPIO issue seems to have brought us end-users so many trouble, to probably everyone …

Isn’t there a perfect-solution to this trouble?

Cheers
Pei

20

Pinmux setting is a must-have thing. There is no such thing for “I want all unused thing to be GPIO”. Just pick those you need but not everything.

If you cannot generate dtsi from spreadsheet because no windows, then please directly modify existing dtsi file content.

Modify the tristate field for the GPIO you want to use (spi1_cs0_pz6 here).

21

Yes, that is the number I’m using in my code. That is the 18 I specified in my code.