DTSI Files from Pinmux Config Spreadsheet Not Controlling GPIOs Correctly on Jetson Orin Nano

Hello NVIDIA Community,

I’m encountering an issue with configuring GPIOs using the Jetson_Orin_NX_and_Orin_Nano_series_Pinmux_Config_Template.xlsm spreadsheet for my custom project. Specifically, I’m trying to configure GPIO04 and GPIO05 as outputs and toggle their values, but I’m unable to map them correctly to the GPIO space or control them as expected.

Here’s a brief overview of the issue:
I used the provided spreadsheet tool to define the GPIO configuration and exported the DTSI files.
I’m working with GPIO04 (line 127) and GPIO05 (line 128), but I can’t seem to toggle their values, and they don’t appear to respond as expected.
I’ve confirmed that the DTSI files generated by the spreadsheet are loaded, but the GPIOs are not behaving as intended.

Could someone help me understand how the GPIO mapping works in this case and why I might be having trouble controlling these pins?

For reference, here are the links to the spreadsheet and the DTSI files:

Jetson Orin NX and Orin Nano Series Pinmux Config Template
https://www.dropbox.com/scl/fi/6007ruxmsrz69xit5mwox/Jetson_Orin_NX_and_Orin_Nano_series_Pinmux_Config_Template__os1__.xlsm?rlkey=ba9gvnbths8ukgipo6z0nep4p&st=49e5kt08&dl=0
DTSI files (cernis)
https://www.dropbox.com/scl/fi/4sq9vt7s1r26mwuuhmomc/dtsi_cernis.tar?rlkey=imd69jv1svfm92snrt9dx7f1j&st=d4mibgyw&dl=0

Any guidance or insights on how to resolve this issue would be greatly appreciated!

Thank you for your help!

Hi fhardy,

What’s the Jetpack version in use?

Let me check GPIO04 in your case.
It seems you’ve configured it as following:
image
Please confirmed the generated pinmux/gpio dtsi have both been placed to correct directory and you’ve also specified PINMUX_CONFIG in board config.

To control this pin through gpiod, please run the following command.

$ sudo su
# gpioset --mode=wait `gpiofind "PCC.01"`=0
# gpioset --mode=wait `gpiofind "PCC.01"`=1

Kevin

Here is my build process/environment -

cp /home/fred/Downloads/dt_os1_cernis1/Orin-cernis-padvoltage-default.dtsi ./R36.3.0/Linux_for_Tegra/bootloader/generic/BCT/.
cp /home/fred/Downloads/dt_os1_cernis1/Orin-cernis-pinmux.dtsi ./R36.3.0/Linux_for_Tegra/bootloader/generic/BCT/.
cp /home/fred/Downloads/dt_os1_cernis1/Orin-cernis-gpio-default.dtsi ./R36.3.0/Linux_for_Tegra/bootloader/.
cp /home/fred/code/nano-bsp/cernis.conf ./R36.3.0/Linux_for_Tegra/.
cd ./R36.3.0/Linux_for_Tegra
cd ./bootloader
find . -type f -exec sed -i ‘s/cvb_eeprom_read_size = <0x100>/cvb_eeprom_read_size = <0x0> /*(FiSH)*//g’ {} +
cd …
./tools/kernel_flash/l4t_initrd_flash.sh --external-device nvme0n1p1
-c tools/kernel_flash/flash_l4t_t234_nvme.xml -p “-c bootloader/generic/cfg/flash_t234_qspi.xml”
–showlogs --network usb0 cernis internal

cernis.conf - Dropbox
p3767.conf.common - Dropbox

Thanks
Fred

Your steps look good to me.
Please share the full flash log.

Could you control PCC.01 with the commands I shared above?

Kevin,

I cannot control PCC.01. Although it shows as an output, it doesn’t change values when toggled. I verified this via readback and voltage measurement. gpioinfo states that PCC.01 is on gpiochip1 pin 13, while the spreadsheet states that this same GPIO is on gpiochip0 pin 127. I’m not sure what to make of that.

Here is the full loading log:
flash_log_102124.txt

I’m pretty stuck at the moment and would appreciate the help.

Cheers,
Fred

Please share the result of the following command on your board at this moment.

$ sudo busybox devmem 0x0c302050

oss@oss-desktop:~$ sudo busybox devmem 0x0c302050
sudo: busybox: command not found

Hi @fhardy

You need to install the busybox package as:

sudo apt install busybox

and then, run again the command

Regards!
Eduardo Salazar
Embedded SW Engineer at RidgeRun

Contact us: support@ridgerun.com
Developers wiki: https://developer.ridgerun.com/
Website: www.ridgerun.com

thanks, should have figured that out myself

oss@oss-desktop:~$ sudo busybox devmem 0x0c302050
0x00000001

oss@oss-desktop:~$ sudo busybox devmem 0x0c302050
0x00000001

Hi there,

I am seeing the same thing on my dev board - can’t toggle the GPIOs and sudo busybox devmem 0x0c302050 returns 0x00000001

You can access my build via this tar file on Dropbox.

0x00000001 should be the expected result to use PCC.01 as GPIO and control it.

How do you verify whether it can be controlled or not?

# gpioset `gpiofind "PCC.01"`=1
# gpioget  `gpiofind "PCC.01"`
# 0
and measuring GPIO with voltmeter

Please apply the patch in 40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF and check if it could help in your case.

Kevin,

I don’t have that file in the r36.3 or r36.4 code pull. I searched but cannot find tegra234_pinctrl referenced in the codebase.

Here’s the r36.4 code pull: [Dropbox].

Could you pull this code, look through it, and see if the patch you mentioned would work? I don’t see how it would, but perhaps there’s a way to make the change outlined in the patch work.

Thanks,
Fred

Kevin

I don’t see any reference to tegra_pinctrl_soc_data in my entire codebase. Could I be missing something. Do I need to do a menuconfig type thing to pull in this level of GPIO control?

Thanks
Fred

You should apply that patch in kernel source → build kernel image —> replace it in BSP package.

Have you referred to Kernel Customization — NVIDIA Jetson Linux Developer Guide 1 documentation to download the kernel souce?

Kevin

I created new kernel but still not seeing GPIO’s configured per the DTSI’s. Here is my workflow -

Run on Ubuntu 20.04 as super user

Insure build tools

apt install build-essential bc flex bison libssl-dev xxd kmod libncurses-dev device-tree-compiler -y

Get NVidia resources

./setup_kernel_env.sh

Check out sources

./get_jetson_files_r36.sh

Copy over custorm hardware DTSI’s

cp ./Orin-cernis-padvoltage-default.dtsi ./R36.4.0/Linux_for_Tegra/bootloader/generic/BCT/.
cp ./Orin-cernis-pinmux.dtsi ./R36.4.0/Linux_for_Tegra/bootloader/generic/BCT/.
cp ./Orin-cernis-gpio-default.dtsi ./R36.4.0/Linux_for_Tegra/bootloader/.

Copy over cernis config file

cp ./cernis.conf ./R36.4.0/Linux_for_Tegra/.

Bootload change to disable EEPROM check in MB1 bootloader

cd ./R36.4.0/Linux_for_Tegra/bootloader/.
find . -type f -exec sed -i ‘s/cvb_eeprom_read_size = <0x100>/cvb_eeprom_read_size = <0x0> /*(FiSH)*//g’ {} +
cd …

Pull kernel code

cd ./source
./source_sync.sh -k -t jetson_36.4

Apply patch to fix GPIO assignments

cd ./kernel/kernel-jammy-src/
sudo git apply …/…/…/…/…/40hdr_SPI1_gpio_padctl_register_bit10_effect_by_gpiod_tools_in_JP6.patch
cd …/…

Make kernel and dtb

export CROSS_COMPILE=/opt/nvidia/toolchain/aarch64–glibc–stable-2022.08-1/bin/aarch64-buildroot-linux-gnu-
export KERNEL_HEADERS=$(pwd)/kernel/kernel-jammy-src
make -C kernel
export INSTALL_MOD_PATH=$(pwd)/…/rootfs
sudo -E make install -C kernel

Make device tree blob

cp kernel/kernel-jammy-src/arch/arm64/boot/Image …/kernel/Image
make dtbs
cp kernel-devicetree/generic-dts/dtbs/* …/kernel/dtb/.
cd …

Flash to device which needs to be in recovery mode

./tools/kernel_flash/l4t_initrd_flash.sh --external-device nvme0n1p1
-c tools/kernel_flash/flash_l4t_t234_nvme.xml -p “-c bootloader/generic/cfg/flash_t234_qspi.xml”
–showlogs --network usb0 cernis internal

What do you mean about “not seeing GPIO’s configured per the DTSI’s”?

Have you assigned the Orin-cernis-pinmux.dtsi as PINMUX in your custom board config?

What’s your use case for these 2 GPIOs?
Have you also tried to control other pin successfully?