How to set the initial state of pin pex_15_rst_n_maf1 to low level during UEFI stage

By decompiling “/kernel/dtb//tegra234-p3701-0000-p3737-0000. dtb”, disabled pcie@141a0000 After compilation and downloading to SPI flash, the pin pex_15_rst_n_maf1 still resets during the UEFI stage.

PCIE C5 to SATA keeps reporting the following error, and we still suspect that it is caused by the reset of PEx_15_rst_n_maf1 during the UEFI stage.

execute “dtc -I fs -O dts -o extracted_pro.dts /proc/device-tree”, view extracted_pro.dts


Disabled cannot take effect

Modify your device tree on the host PC and do flash. Also, modify the correct file.

Read your own flash log and it will tell you which file should be modified.

If you still don’t know what file to modify, dump your flash log here and I can tell you.

flash_log.txt (92.8 KB)
This is the log from Flash, please。

Thank you very much for your help. The error “ata1: softreset failed (1st FIS failed)” has been resolved because the RXP and RXN of the LAN were connected incorrectly. After recovery, the issue was resolved.



The main question now is: why are both UEFI and kernel DTBs disabled pcie@141a0000 All of them have failed.

The file in use here is the 0004 one but not 0000 one.

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