PCIe adoptation

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
1

Hello!
I need to reconfigure C5 to edpoint.
I read PCIe Controller Configuration

I can not find tegra234-soc-pcie.dtsi where changes need to be made
/hardware/nvidia/soc/t23x/kernel-dts/tegra234-soc/tegra234-soc-pcie.dtsi - there is no way.

in Enable PCIe in a Customer CVB Design, in point 1 written :

  1. Enable the appropriate PCIe node listed under topic “Here are the PCIe controller DT nodes:”:
    In what file should I do this?
    I understand correctly that all these changes that are described in this section relate to one file -
    tegra234-soc-pcie.dtsi?

In tegra234-p3737-0000+p3701-0000.dts i find some nodes:

pipe2uphy node - It’s them?

		pcie@141a0000 {
			status = "okay";

			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
			vpcie3v3-supply = <&vdd_3v3_pcie>;
			vpcie12v-supply = <&vdd_12v_pcie>;

			phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
			       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
			       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
				    "p2u-5", "p2u-6", "p2u-7";
		};

		pcie-ep@141a0000 {
			status = "disabled";
			vddio-pex-ctl-supply = <&vdd_1v8_ls>;
			reset-gpios = <&gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW>;
			nvidia,refclk-select-gpios = <&gpio_aon
						      TEGRA234_AON_GPIO(AA, 4)
						      GPIO_ACTIVE_HIGH>;

			phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
			       <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
			       <&p2u_nvhs_6>, <&p2u_nvhs_7>;
			phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
				    "p2u-5", "p2u-6", "p2u-7";
		};

These are the records that should be in tegra234-soc-pcie.dtsi?

If so, then all I need to do is change status field from disabled to okay, for pcie-ep@141a0000 ?

4

You don’t need to do that.

Just follow this document and use rel-35.5 BSP and it shall work.

https://docs.nvidia.com/jetson/archives/r36.3/DeveloperGuide/SD/Communications/PcieEndpointMode.html?highlight=endpoint

5

Hello @EugeneVolkov, I asked about the tegra234-soc-pcie.dtsi file in this post. The file is changed to hardware/nvidia/t23x/nv-public/tegra234.dtsi.

I think; if you want to change PCIe functionalities, you need to change the tegra234-p3737-0000+p3701-0000.dts file rather than the tegra234.dtsi file

1 Like
6

Better clarifying it is rel-35 or rel-36 first…

7

Hello. Is repo - r36.3.

8

Device tree is still not needed to be configured. The document to change ODMDATA is still valid.

1 Like
9

in

Enabling SRNS for PCIe Endpoint

To modify BPMP dtb, use the Device Tree Compiler (dtc) to convert it back from binary to source code.

Does this document talk about this file?
tegra234-p3737-0000+p3701-0004-nv.dtb

Can you edit the dts source in /source/hardware… ?

It’s also not clear which file is meant:

Add the nvidia,enable-srns device tree property to the RP and EP kernel dts in the corresponding PCIe controller

Is this this file?
Linux_for_Tegra/bootloader/kernel_tegra234-p3737-0000+p3701-0004-nv.dtb

I find record in flash log:

copying bpfdtbfile(/home/jetson/Jetson_RT/Linux_for_Tegra/bootloader/generic/tegra234-bpmp-3701-0004-3737-0000.dtb)… done.

This is the BPMP dtb file which needs to be edited?

10

SRNS support on rel-36 is still not clear. That document may not work.

Please skip that part.

If you insist trying SRNS, please try on rel-35.

11

In rel-35.5 i didn’t find any instructions in the documentation for disable Spread Spectrum Control (SSC) and Enabling SRNS
but they are in rel-36.3.
What should I do in this case?

12

Oh ok… then the content you saw in rel-36.3 document is actually for rel-35.5.

Sorry for that. Some document mistake.

13

Has anyone tried this on 36.3?
I’ll try, maybe it will work. Too long to switch to 35.5

14

No, no one ever tried this on rel-36. I don’t even guarantee this would work.

15

But these recommendations are part of the DeveloperGuide for 36.3.
And they are not in the DeveloperGuide for 35.5, 34.5…
I completely stopped understanding.

16

Yes, they are document mistake as I said.

You just need to think that part is for rel-35 but not rel-36… Rel36 should not even have these content yet.

17 
root@ubuntu:/sys/kernel/config/pci_ep# sudo dmesg | tail
[   15.340771] tegra-xudc 3550000.usb: EP 11 (type: bulk, dir: in) enabled
[   15.340791] tegra-xudc 3550000.usb: EP 6 (type: bulk, dir: out) enabled
[   15.599874] l4tbr0: port 1(usb0) entered blocking state
[   15.599888] l4tbr0: port 1(usb0) entered forwarding state
[   15.600527] IPv6: ADDRCONF(NETDEV_CHANGE): l4tbr0: link becomes ready
[   15.888189] rfkill: input handler disabled
[   35.806545] VDD_3V3_PCIE: disabling
[   35.806612] VDD_12V_PCIE: disabling
[  218.372382] tegra194-pcie 141a0000.pcie-ep: **Failed to init UPHY for PCIe EP: -22**
[  255.291634] tegra194-pcie 141a0000.pcie-ep: Failed to init UPHY for PCIe EP: -22

ODMDATA=“gbe-uphy-config-22,hsstp-lane-map-3**,nvhs-uphy-config-1**,hsio-uphy-config-0,gbe0-enable-10g”;

I changed ODMDATA but for some reason it doesn’t work

Looks like the status = “disabled”; doesn’t need to be changed

18

Is this still rel-36 or rel35…?

19

I’m trying rel-36.

20

please dump the result of this node

sudo cat /sys/kernel/debug/bpmp/debug/uphy/config

21

doesn’t output anything:

root@ubuntu:/sys/kernel/config/pci_ep# cat /sys/kernel/debug/bpmp/debug/uphy/config
root@ubuntu:/sys/kernel/config/pci_ep#
22

Does your board get some secureboot fused or something there?

I just tried to dump this on my board too and it can dump the info normally.