Jetson Orin Nano - SPI strange signals

Robotics & Edge Computing Jetson Systems Jetson Orin Nano
1

Hi,

I’m having some problems making the spi working, I’ve enabled the spi following this

1. Run Jetson IO 

$ sudo /opt/nvidia/jetson-io/jetson-io.py 

2. Configure SPI1 Configure Jetson 40pin Header => Configure header pins manually => Select "spi1" => Back -> Save pin changes => Save and reboot to reconfigure pins

and I test the spi loopback with the spi_test up to this point is working

$ sudo ./spidev_test -D /dev/spidev0.0 -O -H -v -p “HelloWorld123456789abcdef”spi mode: 0x3bits per word: 8max speed: 500000 Hz (500 KHz)TX | 48 65 6C 6C 6F 57 6F 72 6C 64 31 32 33 34 35 36 37 38 39 61 62 63 64 65 66 __ __ __ __ __ __ __  | HelloWorld123456789abcdefRX | 48 65 6C 6C 6F 57 6F 72 6C 64 31 32 33 34 35 36 37 38 39 61 62 63 64 65 66 __ __ __ __ __ __ __  | HelloWorld123456789abcdef

So I connect the LSM6DSL board to the orin nano e I wrote a python code to read the WHO_AM_I register of the chip and I get always 0xff.

With the help of a logic analyzer I captured the signals

image
image3290×2159 117 KB

No one is correct… the chip select is toggling and not stay low, the clock is not constant.

the code that I used:

spi = spidev.SpiDev()
spi.open(0, 0)
spi.mode = 3
spi.bits_per_word = 8
spi.threewire = False
spi.max_speed_hz = 500000

whoAmI = read_register(spi, 0x0F)
print("Testing \"Who Am I\" register {}".format( hex(whoAmI) ))

def read_register(spi, register):
  response = spi.xfer2([register | 0x80, 0x00])
  return response[1]

I’m missing something?

5

Hi andrea.rossetto,

Are you using the devkit or custom board for Orin Nano?
What’s the Jetpack version in use?

If you are using Jetpack 6.x, could you try applying the patch from the following thread to check if it could help for your case?
Jetson orin nano SPI Speed not changing - #9 by KevinFFF

Please also check if there’s any error in dmesg.

6

thank you @KevinFFF , I’m using the devkit and the jetpack 6.2, Where I can find some documentation on how I can modify the devicetree?

If I run this command

$ dtc -I fs /sys/firmware/devicetree/base

I get this output

spi@3230000 {
			iommus = <0x04 0x04>;
			#address-cells = <0x01>;
			dma-coherent;
			clock-names = "spi";
			assigned-clocks = <0x03 0x89>;
			assigned-clock-parents = <0x03 0x66>;
			resets = <0x03 0x5d>;
			interrupts = <0x00 0x26 0x04>;
			clocks = <0x03 0x89>;
			#size-cells = <0x00>;
			dma-names = "rx\0tx";
			compatible = "nvidia,tegra210-spi\0nvidia,tegra114-spi";
			status = "okay";
			reg = <0x00 0x3230000 0x00 0x1000>;
			dmas = <0xed 0x11 0xed 0x11>;
			reset-names = "spi";

			spi@1 {
				spi-max-frequency = <0x2faf080>;
				compatible = "tegra-spidev";
				reg = <0x01>;

				controller-data {
					nvidia,enable-hw-based-cs;
					nvidia,tx-clk-tap-delay = <0x00>;
					nvidia,rx-clk-tap-delay = <0x10>;
				};
			};

			prod-settings {
				#prod-cells = <0x04>;

				prod {
					prod = <0x00 0x194 0x80000000 0x00>;
				};
			};

			spi@0 {
				spi-max-frequency = <0x2faf080>;
				compatible = "tegra-spidev";
				reg = <0x00>;

				controller-data {
					nvidia,enable-hw-based-cs;
					nvidia,tx-clk-tap-delay = <0x00>;
					nvidia,rx-clk-tap-delay = <0x10>;
				};
			};
		};
7

Please refer to Kernel Customization — NVIDIA Jetson Linux Developer Guide to sync and build the kernel source to apply the above change.

Your current device tree configurations look good to me.
Please note that spidev0.0 may map to spi@3230000 and spidev1.0 map to spi@320000 that you can check the dmesg to confirm.

8

@KevinFFF I checked the dmesg

dmesg.txt (58.1 KB)

I can’t figure out why the spi is not working properly

9

We can confirm that spi is active and runs fine in the loopback test, however it does not talk with the device. Going to address that issue later this week and see what is up. First step is ordering a fresh device to rule out that it might be an issue with the device and not the nano.

connect 19 and 21

#!/usr/bin/env python3
import spidev
import time


def loopback_test(bus=0, device=0, mode=0, hz=500000):
    spi = spidev.SpiDev()
    spi.open(bus, device)
    spi.mode = mode
    spi.max_speed_hz = hz
    spi.bits_per_word = 8

    print(f"Testing /dev/spidev{bus}.{device} mode{mode} @ {hz} Hz")
    test_data = list(range(1, 17))  # 0x01..0x10
    print("TX:", test_data)

    rx = spi.xfer2(test_data)
    print("RX:", rx)

    spi.close()

    if rx == test_data:
        print("✅ Loopback PASSED — SPI controller and wiring to header are OK.")
    else:
        print("❌ Loopback FAILED — check bus number, pin short, or wiring.")


if __name__ == "__main__":
    # Try /dev/spidev0.0 first
    loopback_test(bus=0, device=0, mode=0)
    time.sleep(0.5)
    # Also try mode 3
    loopback_test(bus=0, device=0, mode=3)
10

I’ve tested with the code and is working

Testing /dev/spidev0.0 mode0 @ 500000 Hz
TX: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
RX: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
✅ Loopback PASSED — SPI controller and wiring to header are OK.
Testing /dev/spidev0.0 mode3 @ 500000 Hz
TX: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
RX: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
✅ Loopback PASSED — SPI controller and wiring to header are OK.

I try to do some other tests

11

Good, it seems you’ve managed to perform SPI loopback test successfully.
Please let us know if you have further question about using SPI.

13

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