Maxwell Shared Memory Bank WIDE

Accelerated Computing CUDA CUDA Programming and Performance
1

Each bank of shared memory is 8 byte wide like Kepler Architecture or is 4 byte wide?

Note: I don’t mean to access mode, but physical Width of each bank.

Thank you.

2

Maxwell returned to 4 bytes but has improved bandwidth: 1.4.3.2. Shared Memory Bandwidth

3

Thanks a lot.